Method for protecting IC cards against power analysis attacks
AssigneeSTMicroelectronics International N.V.
InventorsGiovanni Fontana, Saverio Donatiello, Giovanni Di Sirio
Life of this patent
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Abstract
A method for protecting data against power analysis attacks includes at least a first phase of executing a cryptographic operation for ciphering data in corresponding enciphered data through a secret key. The method includes at least a second phase of executing an additional cryptographic operation for ciphering additional data in corresponding enciphered additional data. An execution of the first and second phases is undistinguishable by the data power analysis attacks. Secret parameters are randomly generated and processed by the at least one second phase. The secret parameters include an additional secret key ERK for ciphering the additional data in the corresponding enciphered additional data.
Claims26
A method of protecting data against a power analysis attack comprising:
- performing at least one cryptographic operation to cipher the data into corresponding enciphered data through a secret key, using a processor of an IC card;
- and
- performing at least one additional cryptographic operation on both the enciphered data and additional data thereby corresponding enciphered additional data through an additional secret key different than the secret key, using the processor;
- the at least one cryptographic operation being performed a plurality of times, and the at least one additional cryptographic operation being randomly performed between performances of the at least one cryptographic operation such that the enciphered data is interleaved with the enciphered additional data;
- wherein the additional data and the additional secret key are randomly generated.
A method of protecting data in an IC card against a power analysis attack comprising:
- performing a plurality of cryptographic operations in the IC card to cipher the data into corresponding enciphered data through a secret key, using a processor;
- and
- performing at least one additional cryptographic operation in the IC card randomly between performances of the plurality of cryptographic operations on both the corresponding enciphered data and additional random plain text thereby corresponding enciphered additional data through an additional secret key different than the secret key, using the processor;
- the at least one cryptographic operation being performed a plurality of times, and the at least one additional cryptographic operation being randomly performed between performances of the at least one cryptographic operation such that the enciphered data is interleaved with the enciphered additional data;
- wherein the random plain text and the additional secret key are randomly generated in the IC card.
An IC card comprising:
- an IC card substrate;
- and
- a processor carried by said IC card substrate and being configured to perform at least one cryptographic operation to cipher data into corresponding enciphered data through a secret key, and to perform at least one additional cryptographic operation on both the enciphered data and additional data thereby corresponding enciphered additional data through an additional secret key different than the secret key;
- said processor configured to perform the at least one cryptographic operation being a plurality of times, to randomly perform the at least one additional cryptographic operation between performances of the at least one cryptographic operation such that the enciphered data is interleaved with the enciphered additional data;
- said processor further configured to randomly generate the additional data and the additional secret key.
An IC card comprising:
- an IC card substrate;
- and
- a processor carried by said IC card substrate and being configured to perform a plurality of cryptographic operations to cipher data into corresponding enciphered data through a secret key, and to perform at least one additional cryptographic operation randomly between performances of the plurality of cryptographic operations on both the enciphered data and additional random plain text thereby corresponding enciphered additional data through an additional secret key different than the secret key;
- said processor configured to perform the at least one cryptographic operation being a plurality of times, and to randomly perform the at least one additional cryptographic operation between performances of the at least one cryptographic operation such that the enciphered data is interleaved with the enciphered additional data;
- said processor further configured to randomly generate the random plain text and the additional secret key.
An integrated circuit for an IC card comprising:
- a processor configured to
- perform at least one cryptographic operation to cipher data into corresponding enciphered data through a secret key,
- perform at least one additional cryptographic operation on both the enciphered data and additional data thereby corresponding enciphered additional data through an additional secret key different than the secret key,
- perform the at least one cryptographic operation being a plurality of times, and randomly perform the at least one additional cryptographic operation between performances of the at least one cryptographic operation such that the enciphered data is interleaved with the enciphered additional data;
- and
- randomly generate the additional data and the additional secret key.
Dependencies are inferred from the claim text.