Frequency and phase acquisition of a clock and data recovery circuit without an external reference clock
AssigneeVitesse Semiconductor Corporation
InventorIan Kyles
Life of this patent
Estimating the term…
Abstract
A clock and data recovery device receives a serial data stream and produces recovered clock and data signals. The clock and data recovery device operates over a range of frequencies and without use an external reference clock. A first loop supplies a first clock signal to a second loop. The second loop modifies the first clock signal to produce the recovered clock signal and uses the recover clock signal to produce the recovered data signal. The first loop changes the frequency of the first clock signal based on frequency comparison and data transition density metrics.
Claims11
Referenceless clock and data recovery circuitry, comprising:
- a first timing loop including:
- an oscillator to produce a plurality of first clock signals having the same frequency but differing phases in accordance with a frequency control signal;
- phase interpolation circuitry to receive the first clock signals and produce an output clock signal based on the first clock signals and a phase control signal;
- a transition density detector, coupled to the output clock signal and a data input signal, to produce a transition density signal indicative of the transition density of the data input signal relative to a frequency of the output clock signal;
- a frequency comparator coupled to the first clock signal and the output clock signal to produce a frequency comparison signal indicative of the relative frequencies of the first clock signals and the output clock signal;
- and
- a controller to generate the frequency control signal based on the transition density signal and the frequency comparison signal;
- and
- a second timing loop including:
- the phase interpolation circuitry;
- a phase detector to receive a data input signal and the output clock signal and to produce a phase detection signal;
- and
- a loop filter configured to produce the phase control signal by filtering the phase detection signal.
A method for clock and data recovery without use of an externally supplied reference clock signal, comprising:
- measuring a frequency comparison indicative of the relative frequencies of a VCO clock signal and an output recovered clock signal;
- measuring a data transition density indicative of transition density of a data input signal relative to the frequency of the output recovered clock signal;
- searching for circuit settings that allow locking the output recovered clock signal to the data input signal, where the locking is based on the measured frequency comparison and the measured data transition density;
- and
- tracking the data input signal, where tracking the data input signal comprises adjusting the circuit settings of a digital clock and data recovery circuit generating the output recovered clock signal to track a frequency of the data input signal and is performed after the searching meets a search criterion.
A method for clock and data recovery without use of an externally supplied reference clock signal, comprising:
- measuring a frequency comparison indicative of the relative frequencies of a VCO clock signal and an output recovered clock signal;
- measuring a data transition density indicative of transition density of a data input signal relative to the frequency of the output recovered clock signal;
- searching for circuit settings that allow locking the output recovered clock signal to the data input signal, where the locking is based on the measured frequency comparison and the measured data transition density;
- wherein the searching comprises
- sweeping a setting through a range of values until the measured data transition density meets a criterion, with the measuring the data transition density indicative of transition density of the data input signal relative to the frequency of the output clock signal performed for each value of the setting.
A method for clock and data recovery without use of an externally supplied reference clock signal, comprising:
- measuring a frequency comparison indicative of the relative frequencies of a VCO clock signal and an output recovered clock signal;
- measuring a data transition density indicative of transition density of a data input signal relative to the frequency of the output recovered clock signal;
- searching for circuit settings that allow locking the output recovered clock signal to the data input signal, where the locking is based on the measured frequency comparison and the measured data transition density;
- wherein the method is performed by circuitry including a clock and data recovery circuit with a prescaler and a voltage-controlled oscillator having a range control and a frequency control, and wherein the searching for circuit settings that allow locking of the digital clock and data recovery circuit to the data input signal comprises:
- sweeping a prescale control through a range of prescale control values;
- sweeping a range control through a range of range control values for each value of the prescale control;
- and
- sweeping a frequency control through a range of frequency control values for each value of the range control until the measured data transition density meets a criterion.
A method for clock and data recovery without use of an externally supplied reference clock signal, comprising:
- measuring a frequency comparison indicative of the relative frequencies of a VCO clock signal and an output recovered clock signal;
- measuring a data transition density indicative of transition density of a data input signal relative to the frequency of the output recovered clock signal;
- searching for circuit settings that allow locking the output recovered clock signal to the data input signal, where the locking is based on the measured frequency comparison and the measured data transition density;
- wherein the method is performed by circuitry including a clock and data recovery circuit with a prescaler and a voltage-controlled oscillator having a range control and a frequency control, and wherein the searching for circuit settings that allow locking of the digital clock and data recovery circuit to the data input signal comprises:
- sweeping a prescale control through a range of prescale control values;
- sweeping a range control through a range of range control values for each value of the prescale control;
- and
- sweeping a frequency control through a range of frequency control values for each value of the range control until the measured data transition density and the measured frequency comparison meet criteria.
Dependencies are inferred from the claim text.