Frequency detector and method for detecting frequencies

A frequency detector, comprising a multi-phase clock generation unit, a sampling unit connected to said multi-phase clock generation unit and a digital logic unit connected to said sampling unit, wherein said multi-phase clock generation unit receives an inputted single-phase clock and transforms said inputted single-phase clock into a multi-phase clock, said sampling unit receives inputted random data and samples said random data with said multi-phase clock generated by said multi-phase clock generation unit, each data bit of said random data is divided into several sampling intervals according to a phase number of said multi-phase clock, said digital logic unit logically analyzes sampling values outputted by said sampling unit, judges said corresponding sampling interval of each sampling value and outputs a signal for indicating that a frequency of said random data is higher or lower than said frequency of said single-phase clock based on differences in said corresponding sampling intervals of sampling values at two adjacent times;

• further comprising a first signal end and a second signal end, connected to said digital logic unit, wherein said first signal end is for outputting a first signal for indicating that said frequency of said random data is higher than said frequency of said single-phase clock, said second signal end is for outputting a second signal for indicating that said frequency of said random data is lower than said frequency of said single-phase clock;
• wherein, if said corresponding sampling intervals of said sampling values at two adjacent times change along a first direction in which said random data are transmitted, said first signal end outputs said first signal for indicating that said frequency of said random data is higher than said frequency of said single-phase clock.

A method for detecting frequency, comprising following steps:

• (1) inputting a single-phase clock by a clock signal input end to a multi-phase clock generation unit;
• (2) transforming the single-phase clock into a multi-phase clock by the multi-phase clock generation unit;
• (3) inputting random data by a data signal input end and dividing each data bit of the random data into several sampling intervals according to a phase number of the multi-phases clock;
• (4) sampling the random data inputted by the data signal input end by a sampling unit with the multi-phase clock generated by the multi-phase clock generation unit, and outputting sampling values of each time to a digital logic unit;
• and
• (5) logically analyzing the sampling values outputted by the sampling unit, judging the corresponding sampling interval of each sampling value and outputting a signal for indicating a relatively higher or lower frequency based on differences in the corresponding sampling intervals of the sampling values at two adjacent times;
• wherein, if the corresponding sampling intervals of the sampling values at two adjacent times change along a first direction in which the random data are transmitted, a first signal end outputs a first signal for indicating that a frequency of the random data is higher than a frequency of the single-phase clock.