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US 8,804,856 B2Granted
Programmable engine having a reconfigurable accelerator data path for testing and calibration of analog front ends in radio devices
AssigneeIntel Corporation
InventorsMarian K. Verhelst, Hasnain Lakdawala, Krishnamurthy Soumyanath, Masoud Sajadieh
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Abstract
Briefly, in accordance with one or more embodiments, a radio device comprises an analog front end comprising a radio to transmit and/or receive radio-frequency signals, and a programmable engine coupled to the analog front end. The programmable engine is capable of being programmed to perform one or more tests on the analog front end and includes a reconfigurable data path reconfigurable by the programmable engine to perform one or more tests on the analog front end.
Claims10
An apparatus, comprising:
- an analog front end comprising a radio to transmit or receive radio-frequency signals, or combinations thereof;
- and
- a programmable engine coupled to the analog front end, wherein the programmable engine is configured to perform one or more tests on the analog front end;
- wherein the programmable engine includes a reconfigurable data path reconfigurable by the programmable engine to perform one or more tests on the analog front end, and a post processing module, the post processing module including one or more reconfigurable accelerator blocks to perform processing routines for the one or more tests, and a reconfigurable interconnect to connect or sequence the one or more accelerator blocks according to the test to be performed by the programmable engine.
1 more element
A system, comprising:
- a processor and a memory coupled to the processor;
- and
- a radio device coupled to the processor to transmit data stored in the memory and to store data received by the radio device in the memory, wherein the radio device comprises:
- an analog front end comprising a radio to transmit or receive radio-frequency signals, or combinations thereof;
- and
- a programmable engine coupled to the analog front end, wherein the programmable engine is configured to perform one or more tests on the analog front end;
- wherein the programmable engine includes a reconfigurable data path reconfigurable by the programmable engine to perform one or more tests on the analog front end, and a post processing module, the post processing module including one or more reconfigurable accelerator blocks to perform processing routines for the one or more tests, and a reconfigurable interconnect to connect or sequence the one or more accelerator blocks according to the test to be performed by the programmable engine.
4 more elements
Dependencies are inferred from the claim text.