Signal multiplexing method, signal demultiplexing method, digital signal reference frequency correction method, multiplexing device, demultiplexing device, radio communication system, and digital signal reference frequency correction device

A signal multiplexing/demultiplexing device of a communication system, said signal multiplexing/demultiplexing device comprising:

• a phase difference detection circuit detecting a phase difference from a reference frequency of a multiplexed signal and a reference frequency of each of digital part lines, the digital part lines operating uniquely and asynchronously;
• a first interpolation circuit performing an interpolation on a digital transmitting signal of each of the digital part lines with a signal delayed by a time corresponding to the phase difference for each of the digital part lines based on the phase difference detected by the phase difference detection part to obtain a digital transmitting signal sampled with the reference frequency of the multiplexed signal for each of the digital part lines;
• a signal multiplexing circuit multiplexing the digital transmitting signals of the digital part lines and outputting to the amplifier unit as a multiplexed digital signal,
• a signal demultiplexing circuit demultiplexing the multiplexed signal into one or more digital receiving signals of an amplifier;
• and
• an interpolation circuit performing an interpolation on the one or more digital receiving signals with a signal delayed by a time corresponding to a phase difference for the amplifier, based on the phase difference detected by the phase difference detection circuit, to obtain one or more digital receiving signals sampled with the reference frequency for each of the digital part lines.

A radio communication system including a multiplexing/demultiplexing device and a plurality of base station devices, wherein:

• each of the plurality of base station devices outputs a first reference frequency and a first digital signal sampled with the first reference frequency to the multiplexing/demultiplexing device,
• the multiplexing/demultiplexing device obtains a second reference frequency of the multiplexed signal and performs an interpolation process on each of the first digital signals to generate a second digital signal based on phase difference information regarding a phase difference between the first reference frequency and the second reference frequency,
• the second digital signals for the base station devices that have been obtained from the interpolation process are sampled with the second reference frequency, multiplexed, and transmitted to an amplifying part,
• wherein the signal multiplexing/demultiplexing device:
• demultiplexes a multiplex digital signal sampled with the second reference frequency into first digital signals for each of plurality of the base station devices;
• obtains an operation clock as the first reference frequency from each of the plurality of base station devices;
• performs the interpolation process on each of the second digital signals to generate the first digital signal for each of the plurality of base station devices based on phase difference information regarding a phase difference between the first reference frequency and the second reference frequency;
• and
• samples each of the generated first digital signals with the first reference frequency for each of the plurality of base station devices and outputs the generated second digital signals to corresponding base station devices, and
• wherein said first and second digital signals operate uniquely and asynchronously.

A multiplexing/demultiplexing device comprising a processor executing instructions from a memory, said instructions, when executed by the processor, causing said device to:

• input an operation clock of each of digital part lines as a first reference frequency for each of the digital part lines, the digital part lines operating uniquely and asynchronously;
• input an operation clock of an amplifier line as a second reference frequency;
• input a first digital signal synchronized with the first reference frequency for each of the digital part lines;
• detect phase difference information regarding a phase difference between the first reference frequency and the second reference frequency for each of the digital part lines;
• perform an interpolation process on the first digital signal with an interpolation signal based on the phase difference information for each of the digital part lines;
• synchronize a second digital signal obtained from the interpolation process with the second reference frequency and output the second digital signal for each of the digital part lines;
• multiplex the second digital signals respectively outputted for the digital part lines and outputting to the amplifier unit as a multiplexed digital signal;
• input the operation clock of each of the digital part lines as the second reference frequency;
• input the operation clock of the amplifier line as the first reference frequency for each of the digital part lines;
• demultiplex a digital signal multiplexed in synchronism with the second reference frequency into the first digital signals for the output lines;
• detect phase difference information regarding a phase difference between the first reference frequency and the second reference frequency for each of the digital part lines;
• and
• synchronize a second digital signal obtained from the interpolation process with the first reference frequency for each of the digital part lines and outputting the second digital signal.