Semiconductor memory device and read wait time adjustment method thereof, memory system, and semiconductor device

A system comprising a controller chip and a semiconductor memory chip interconnected to the controller chip, the controller chip comprising:

• a set of first terminals that is connected to the semiconductor memory chip through a set of first signal lines;
• and
• a control circuit configured:
• to communicate with the semiconductor memory chip through the set of first terminals to carry out a read test on the semiconductor memory chip;
• to generate and output, in response to a result of the read test, onto the set of first terminals edge specifying information that takes a selected one of a plurality of states, the edge specifying information causing the semiconductor memory chip to activate a data-strobe signal at a first timing when the selected one of the edge specifying information is a first state and at a second timing, that is different from the first timing, when the selected one of the edge specifying information is a second state;
• and
• to generate and output onto the set of first terminals a read command that causes the semiconductor memory chip to return to the controller chip a data signal while activating the strobe signal at one of the first and second timings that is designated by the selected one of the states of the edge specifying information.

A method comprising reading data out of a semiconductor memory chip,

• the reading comprising:
• carrying out a read test on the semiconductor memory chip;
• producing, in response to a result of the read test, edge specifying information that takes a selected one of a plurality of states, a first one of the states of the information instructing the semiconductor memory chip to commence activation of a strobe signal at a first timing, and a second one of the states of the information instructing the semiconductor memory chip to commence activation of the strobe signal at a second timing that is different from the first timing;
• and
• issuing a data read command that instructs the semiconductor memory chip to return a data signal while commencing activation of the strobe signal at one of the first and second timings that is designated by the selected one of the states of the edge specifying information.