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US 8,804,428 B2Granted
Determining system lifetime characteristics
AssigneeMicron Technology, Inc.
InventorTodd Marquart
Life of this patent
Estimating the term…
Abstract
The present disclosure includes methods and systems for determining system lifetime characteristics. A number of embodiments include a number of memory devices and a controller coupled to the number of memory devices. The controller can be configured to perform a number of operations on the number of memory devices using a number of trim parameters at a testing level, and determine a system lifetime characteristic based, at least partially, on the number of operations performed on the number of memory devices using the number of trim parameters at the testing level.
Claims32
A system, comprising:
- a number of memory devices;
- and
- a controller coupled to the number of memory devices and configured to:
- perform a number of operations on the number of memory devices using a number of trim parameters at a testing level;
- and
- determine a system lifetime characteristic based, at least partially, on the number of operations performed on the number of memory devices using the number of trim parameters at the testing level, wherein the system lifetime characteristic is a total number of program and/or erase cycles that can be performed by the system prior to a determined system failure.
3 more elements
A system, comprising:
- a number of memory devices;
- and
- a controller coupled to the number of memory devices and configured to:
- perform a number of operations on the number of memory devices using a number of trim parameters at a testing level configured to accelerate degradation of the system, wherein the number of trim parameters at the testing level include a pre-program voltage level at the testing level;
- and
- determine a system lifetime characteristic based, at least partially, on the performed number of operations and an acceleration factor associated with the number of trim parameters at the testing level.
3 more elements
A method of testing a system, comprising:
- adjusting a number of trim parameters associated with operating a number of memory devices of the system from an operating level to a testing level, wherein adjusting the number of trim parameters associated with operating the number of memory devices includes at least one of:
- increasing an erase verify voltage magnitude as compared to an erase verify voltage magnitude associated with the operating level;
- and
- increasing a pre-program voltage magnitude as compared to a pre-program voltage magnitude associated with the operating level;
- performing a number of operations on the number of memory devices using the adjusted number of trim parameters;
- and
- determining a system lifetime characteristic based, at least partially, on the number of operations performed on the number of memory devices using the adjusted number of trim parameters at the testing level.
4 more elements
A method of testing a system, comprising:
- performing a number of operations on a number of memory devices of the system using a number of trim parameters at a testing level;
- determining a system lifetime characteristic based, at least partially, on the number of operations performed on the number of memory devices using the number of trim parameters at the testing level and an acceleration factor associated with the number of trim parameters at the testing level;
- and
- determining a system data retention failure rate based, at least partially, on the number of operations performed on the number of memory devices using the number of trim parameters at the testing level and the acceleration factor.
1 more element
A system, comprising:
- a number of memory devices;
- and
- a controller coupled to the number of memory devices and configured to:
- adjust a number of trim parameters associated with operating the number of memory devices of the system from an operating level of the system to a testing level configured to accelerate degradation of the system;
- perform a number of operations on the number of memory devices using the adjusted number of trim parameters at the testing level;
- and
- determine a system lifetime characteristic based, at least partially, on the performed number of operations and an acceleration factor associated with the adjusted number of trim parameters at the testing level;
- wherein:
- the number of memory devices are tuned memory devices before the number of trim parameters are adjusted from the operating level to the testing level;
- and
- the number of memory devices are de-tuned memory devices after the number of trim parameters are adjusted from the operating level to the testing level.
8 more elements
A system, comprising:
- a number of memory devices;
- and
- a controller coupled to the number of memory devices and configured to:
- perform a number of operations on the number of memory devices using a number of trim parameters at a testing level, wherein the controller is configured to perform the number of operations on the number of memory devices to a total amount of data programmable to the number of memory devices prior to a determined system failure;
- and
- determine a system data retention failure rate based, at least partially, on the number of operations performed on the number of memory devices using the number of trim parameters at the testing level and an acceleration factor associated with the number of trim parameters at the testing level.
3 more elements
A system, comprising:
- a number of memory devices;
- and
- a controller coupled to the number of memory devices and configured to:
- perform a number of operations on the number of memory devices using a number of trim parameters at a testing level;
- and
- determine a system program disturb characteristic and/or a system read disturb characteristic based, at least partially, on the number of operations performed on the number of memory devices using the number of trim parameters at the testing level and an acceleration factor associated with the number of trim parameters at the testing level, wherein the acceleration factor is a pre-determined number of program and/or erase cycles performed on the number of memory devices using the number of trim parameters at an operating level of the system that is equivalent to a program and/or erase cycle performed on the number of memory devices using the number of trim parameters at the testing level.
3 more elements
A system, comprising:
- a number of memory devices;
- and
- a controller coupled to the number of memory devices and configured to:
- perform a number of operations on the number of memory devices using a number of trim parameters at a testing level;
- and
- determine a system lifetime characteristic based, at least partially, on the number of operations performed on the number of memory devices using the number of trim parameters at the testing level, wherein the system lifetime characteristic is a total amount of data programmable to the number of memory devices prior to a determined system failure.
3 more elements
Dependencies are inferred from the claim text.