Nonvolatile memory device and related method of operation

A nonvolatile memory device, comprising:

• a cell array comprising memory cells to be programmed to a plurality of target states;
• a page buffer configured to sense selected ones of the memory cells through bit lines;
• a voltage generator configured to provide a program voltage or a verification voltage to a word line connected to the selected memory cells;
• and
• control logic configured to control the page buffer and the voltage generator such that allowable slow bit numbers applied respectively to the target states are different from one another where the selected memory cells are programmed to at least one of the target states.

A method of programming a nonvolatile memory device, comprising:

• defining a slow bit tolerance for memory cells in the nonvolatile memory device;
• programming the memory cells to at least one target state by performing a plurality of program loops each comprising a program step and a verification step;
• during the programming, determining whether a number of the program loops or the program voltage has reached a predetermined level;
• and
• upon determining that the number of the program loops or the program voltage has reached the predetermined level, modifying a verification voltage for the at least one target state according to the slow bit tolerance.