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US 8,804,179 B2Granted
Information processing system, information processing method, and storage medium
AssigneeCanon Kabushiki Kaisha
InventorHirotaka Seki
Life of this patent
Estimating the term…
Abstract
The information processing system includes an arithmetic processing unit, a master control unit including a master memory, and slave control units each including a slave memory. The master control unit stores in a master memory transmission data including address information that can designate the address of any one of the master memory and the slave memory, which is sent from the arithmetic processing unit, or transmits the transmission data to the corresponding slave memory via a communication data memory. Such the information processing system can reduce the number of times of directions from the master control unit to the slave control unit.
Claims9
An information processing system, comprising:
- an arithmetic processing unit;
- a master control unit configured to execute processing in accordance with an instruction from the arithmetic processing unit;
- a slave control unit comprising a slave memory, configured to control a load in accordance with the instruction from the arithmetic processing unit;
- a first communication line configured to connect the arithmetic processing unit to the master control unit;
- and
- a second communication line configured to connect the master control unit to the slave control unit, wherein:
- the master control unit comprises an address decoder, a master memory, and a communication data memory;
- the arithmetic processing unit configured to transmit a write command, address information in a system address space, and data to the master control unit via the first communication line;
- the address information in the system address space is information for designating an address in a system address space being a space obtained by integrating a master memory address space of the master memory and a slave memory address space of the slave memory;
- the address decoder comprised in the master control unit configured to analyze the address information in the system address space received from the arithmetic processing unit, and to select a writing destination for the data received from the arithmetic processing unit;
- the master control unit configured to write, when the address decoder selects the master memory as the writing destination, the data received from the arithmetic processing unit to the address of the master memory address space of the master memory corresponding to the address information in the system address space, and to execute the processing based on the data written to the master memory;
- and
- the master control unit configured to generate, when the address decoder selects the slave memory as the writing destination, address information on the slave memory address space based on the address information in the system address space, to write the write command, the address information on the slave memory address space, and the data to the communication data memory, and to transmit the write command, the address information on the slave memory address space, and the data written to the communication data memory to the slave control unit via the second communication line.
10 more elements
An information processing method, which is executed by a system comprising:
- an arithmetic processing unit;
- a master control unit comprising an address decoder, a master memory, and a communication data memory, configured to execute processing in accordance with an instruction from the arithmetic processing unit;
- a slave control unit comprising a slave memory, configured to control a load in accordance with the instruction from the arithmetic processing unit;
- a first communication line configured to connect the arithmetic processing unit to the master control unit;
- and
- a second communication line configured to connect the master control unit to the slave control unit;
- the system configured to form a system address space being a space obtained by integrating a master memory address space of the master memory and a slave memory address space of the slave memory;
- the information processing method comprising:
- transmitting, by the arithmetic processing unit, a write command, address information in the system address space, and data to the master control unit via the first communication line;
- the address information in the system address space is information for designating an address in the system address space;
- analyzing, by the address decoder of the master control unit, the address information in the system address space received from the arithmetic processing unit, and selecting a writing destination for the data received from the arithmetic processing unit;
- writing, by the master control unit, when the address decoder selects the master memory as the writing destination, the data received from the arithmetic processing unit to an address of the master memory address space of the master memory corresponding to the address information in the system address space, and executing the processing based on the data written to the master memory;
- generating, by the master control unit, when the address decoder selects the slave memory as the writing destination, address information on the slave memory address space based on the address information in the system address space, and writing the write command, the address information on the slave memory address space, and the data to the communication data memory;
- and
- transmitting, by the master control unit, the write command, the address information on the slave memory address space, and the data written to the communication data memory to the slave control unit via the second communication line.
12 more elements
Dependencies are inferred from the claim text.