Wireless communication receiver, a wireless communication receiving method and a television receiver

A wireless communication receiving method, comprising:

• performing a first signal processing operation for receiving a wireless communication signal and generating a first output data according to the wireless communication signal;
• performing a deinterleaving operation for storing the first output data into a data storage module and retrieving a deinterleaved data corresponding to the first output data from the data storage module;
• and
• performing a second signal processing operation for generating a second output data according to the deinterleaved data;
• wherein the data storage module is shared by the deinterleaving operation and the second signal processing operation for data storage, and the first signal processing operation comprises:
• receiving the wireless communication signal and accordingly generating a received signal;
• generating a channel state information;
• and
• generating a channel estimation/equalization output by performing a channel estimation/equalization according to the received signal, wherein the first output data includes the channel estimation/equalization output and the channel state information, and the deinterleaving operation stores the channel estimation/equalization output and the channel state information into the data storage module, respectively, and retrieves a deinterleaved data corresponding to the channel estimation/equalization output and a deinterleaved data corresponding to the channel state information from the data storage module, respectively.

A wireless communication receiver, comprising:

• a data storage module;
• a memory bus, coupled to the data storage module;
• a deinterleaver, coupled to the data storage module, for storing a first output data into the data storage module, and retrieving a deinterleaved data corresponding to the first output data from the data storage module;
• and
• a plurality of signal processing circuits, comprising:
• a first signal processing circuit, coupled to the deinterleaver, for receiving a wireless communication signal and generating the first output data by performing a first signal processing operation according to the wireless communication signal, wherein the first signal processing circuit comprises:
• a signal receiving circuit for receiving the wireless communication signal and accordingly generating a received signal;
• a channel estimation/equalization circuit for generating a channel estimation/equalization output by performing a channel estimation/equalization according to the received signal;
• and
• a channel state information generation circuit for generating a channel state information, wherein the first output data includes the channel estimation/equalization output and the channel state information;
• and
• a second signal processing circuit, coupled to the deinterleaver, for generating a second output data by performing a second signal processing operation according to the deinterleaved data;
• wherein the deinterleaver and the second signal processing circuit access the data storage module via the memory bus, and the deinterleaver is further coupled to the channel estimation/equalization circuit and the channel state information generation circuit, and utilized for storing the channel estimation/equalization output and the channel state information into the data storage module, respectively, and retrieving a deinterleaved data corresponding to the channel estimation/equalization output and a deinterleaved data corresponding to the channel state information from the data storage module, respectively.

A television receiver, comprising:

• a data storage module;
• a demodulator, for receiving and demodulating a digital television signal and accordingly generating a bit stream, the demodulator comprising:
• a first signal processing circuit, for generating a first output data by performing a first signal processing operation according to the digital television signal,
• wherein the first signal processing circuit comprises:
• a signal receiving circuit for receiving the digital television signal and accordingly generating a received signal;
• a channel estimation/equalization circuit for generating a channel estimation/equalization output by performing a channel estimation/equalization according to the received signal;
• and
• a channel state information generation circuit for generating a channel state information, wherein the first output data includes the channel estimation/equalization output and the channel state information;
• and
• a deinterleaver, coupled to the first signal processing circuit and the data storage module, for storing the first output data into the data storage module and retrieving a deinterleaved data corresponding to the first output data from the data storage module;
• an error-correction decoding module, coupled to the deinterleaver, for performing an error-correction decoding operation according to the deinterleaved data;
• and
• a descrambler, coupled to the error-correction decoding module, for generating the bit stream by performing a descrambling operation according to an output of the error-correction decoding module;
• and
• a backend decoder, coupled to the demodulator, for receiving and decoding the bit stream;
• wherein the data storage module is shared by the deinterleaver and the backend decoder for data storage, and the deinterleaver is further coupled to the channel estimation/equalization circuit and the channel state information generation circuit, and utilized for storing the channel estimation/equalization output and the channel state information into the data storage module, respectively, and retrieving a deinterleaved data corresponding to the channel estimation/equalization output and a deinterleaved data corresponding to the channel state information from the data storage module, respectively.