Liquid crystal display device capable of reducing number of output channels of data driving circuit
AssigneeLG Display Co., Ltd.
InventorHyunchul Kim
Life of this patent
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Abstract
A liquid crystal display device comprises: a display panel having a pixel array comprising a first group of cells and a second group of cells and configured to share data lines with cells of the first group adjacent in extension direction of the gate lines; a data driving circuit comprising a latch array, wherein the latch array temporally separates first group data to be applied to the liquid crystal cells of the first group and second group data to be applied to the liquid crystal cells of the second group according to data rendering control signals, and outputs the first group data earlier by about ½ horizontal period than the second group data.
Claims12
A liquid crystal display device comprising:
- a liquid crystal display panel having a pixel array comprising a first group of liquid crystal cells connected to odd-numbered gate lines and a second group of liquid crystal cells connected to even-numbered gate lines, wherein each liquid crystal cell of the second group is configured to share data lines with one liquid crystal cell of the first group adjacent to the liquid crystal cell of the second group in an extension direction of the gate lines;
- a data driving circuit comprising a latch array, and for driving data lines in a time-division manner;
- and
- a timing controller for supplying digital video data and data rendering control signals to the data driving circuit and controlling operation timing of the data driving circuit,
- wherein the latch array temporally separates the digital video data supplied from the timing controller into first group data to be applied to the liquid crystal cells of the first group and second group data to be applied to the liquid crystal cells of the second group according to the data rendering control signals, and outputs the first group data earlier by ½ horizontal period than the second group data,
- wherein the ½ horizontal period is a first half horizontal period from an falling edge of a first source output enable signal to an falling edge of a second source output enable signal.
Dependencies are inferred from the claim text.