Resistor-2 resistor (R-2R) digital-to-analog converter with partial resistor network reconfiguration
AssigneeInternational Business Machines Corporation
InventorJoseph A. Iadanza
Life of this patent
Estimating the term…
Abstract
A resistor-2 resistor (R-2R) digital-to-analog converter with partial resistor network reconfiguration. A circuit includes a plurality of resistor stacks. The circuit also includes a plurality of separation resistors which separate each of the plurality of resistor stacks. The circuit further includes a first selection circuit connected to a first resistor stack of the plurality of resistor stacks and a plurality of selection circuits connected between the plurality of separation resistors. The circuit also includes a termination resistor stack connected to a drain of the first resistor stack.
Claims23
A circuit, comprising:
- a plurality of resistor stacks;
- a plurality of separation resistors which separate each of the plurality of resistor stacks;
- a first selection circuit connected to a first resistor stack of the plurality of resistor stacks;
- a plurality of selection circuits connected between the plurality of separation resistors;
- and
- a termination resistor stack connected to a drain of the first resistor stack,
- wherein the termination resistor stack is coupled to a selection gate.
A circuit, comprising:
- a plurality of resistor stacks;
- a plurality of separation resistors which separate each of the plurality of resistor stacks;
- a first selection circuit connected to a first resistor stack of the plurality of resistor stacks;
- a plurality of selection circuits connected between the plurality of separation resistors;
- and
- a termination resistor stack connected to a drain of the first resistor stack,
- wherein the first selection circuit comprises a buffer and an OR gate.
A circuit, comprising:
- a plurality of resistor stacks;
- a plurality of separation resistors which separate each of the plurality of resistor stacks;
- a first selection circuit connected to a first resistor stack of the plurality of resistor stacks;
- a plurality of selection circuits connected between the plurality of separation resistors;
- and
- a termination resistor stack connected to a drain of the first resistor stack,
- wherein the plurality of selections circuits include a tri-state buffer.
A circuit, comprising:
- a plurality of resistor stacks;
- a plurality of separation resistors which separate each of the plurality of resistor stacks;
- a selection circuit connected to a first resistor stack of the plurality of resistor stacks, the selection circuit comprising a buffer and an OR gate;
- a plurality of selection circuits connected to a respective remaining one of the plurality of resistor stacks, the plurality of selection circuits comprising a tri-state buffer;
- and
- a termination resistor stack connected to a drain of the first resistor stack.
A method comprising:
- providing a half address value (HA) to a plurality of resistor stacks;
- and
- determining a source connection of the plurality of resistor stacks based on the half address value,
- wherein the HA is determined based on a most significant bit (MSB) of a digital address.
Dependencies are inferred from the claim text.