Bandwidth extension of an amplifier

An amplifier circuit comprising:

• a gain stage configured to convert a first input voltage signal to a first current signal and to amplify the first input voltage signal according to a first gain;
• and
• a first buffer stage coupled to the gain stage at a first internal node, the first buffer stage configured to convert the first current signal to a first output voltage signal on a first output node and to buffer the first current signal from the gain stage so that a frequency bandwidth of the amplifier circuit may be approximately maintained when the first gain of the gain stage is increased,
• wherein the first buffer stage includes a first transistor coupled between the first internal node and the first output node and an amplifier coupled between the first internal node and a gate of the first transistor such that an increase in the first gain of the gain stage does not appreciably affect a bandwidth of the amplifier circuit.

An amplifier circuit comprising:

• a first input node configured to receive a first input voltage signal;
• a second input node configured to receive a second input voltage signal, the first and second input voltage signals comprising a differential signal;
• a first output node configured to output a first output voltage signal;
• a second output node configured to output a second output voltage signal;
• a voltage converter circuit including one or more voltage converter components configured to convert the first input voltage signal to a first current signal and to convert the second input voltage signal to a second current signal, the voltage converter circuit configured to apply a gain to the both the first and second input voltage signals;
• a first current converter circuit coupled to the voltage converter circuit at a first internal node, the first current converter circuit including one or more first current converter components that include a first transistor coupled between the first internal node and the first output node and a first amplifier coupled between the first internal node and a gate of the first transistor, the first current converter circuit configured to convert the first current signal to the first output voltage signal and to buffer the first current signal from the voltage converter circuit so that a first internal node Resistance-Capacitance (RC) time constant at the first internal node, due to one or more of the one or more voltage converter components or the one or more of the first current converter components, is an order of magnitude smaller than a first output node RC time constant at the first output node, due to a first load coupled to the first output node or one or more of the first current converter components;
• and
• a second current converter circuit coupled to the voltage converter circuit at a second internal node, the second current converter circuit including one or more second current converter components that include a second transistor coupled between the second internal node and the second output node and a second amplifier coupled between the second internal node and a gate of the second transistor, the second current converter circuit configured to convert the second current signal to the second output voltage signal and to buffer the second current signal from the voltage converter circuit so that a second internal node RC time constant at the second internal node, due to one or more of the one or more voltage converter components or the one or more of the second current converter components, is an order of magnitude smaller than a second output node RC time constant at the second output node, due to a second load coupled to the second output node or one or more of the second current converter components, such that an increase in the gain of the voltage converter circuit does not appreciably affect a bandwidth of the amplifier circuit.