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US 8,803,599 B2Granted
Dendrite resistant input bias network for metal oxide semiconductor field effect transistor (MOSFET) devices
AssigneeSTMicroelectronics S.r.l.
InventorJohn C. Pritiskutch
Life of this patent
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Abstract
A circuit includes a direct current (DC) gate termination impedance having an impedance for DC signals higher than a maximum impedance DC at which dendrite growth occurs in the circuit, and a radio frequency (RF) gate termination impedance having an impedance for RF signals lower than a maximum impedance at which RF stability for the circuit is maintained for an application.
Claims21
A circuit, comprising:
- a transistor comprising a gate;
- a gate termination subcircuit connecting the gate to ground, the gate termination subcircuit comprising a direct current (DC) block,
- the DC block configured to cause the gate termination subcircuit to exhibit:
- a DC impedance to DC signals applied to the gate, and
- a radio frequency (RF) impedance to RF signals applied to the gate,
- wherein the DC impedance is higher than a maximum gate termination DC impedance at which dendrite growth occurs on the gate, and
- wherein the RF impedance is lower than a maximum gate termination RF impedance at which RF stability for the circuit is maintained.
4 more elements
A device, comprising:
- a circuit including a transistor comprising a gate, the circuit further comprising:
- a gate termination subcircuit connecting the gate to a ground, the gate termination subcircuit comprising a direct current (DC) block,
- the DC block configured to cause the gate termination subcircuit to exhibit:
- a DC impedance to DC signals applied to the gate, and
- a radio frequency (RF) impedance to RF signals applied to the gate,
- wherein the DC impedance is higher than a maximum gate termination DC impedance at which dendrite growth occurs on the gate, and
- wherein the RF impedance is lower than a maximum gate termination RF impedance at which RF stability for the circuit is maintained.
4 more elements
A method for manufacturing a circuit including a transistor comprising a gate, the method comprising:
- connecting the gate to a ground with a gate termination subcircuit, the gate termination subcircuit comprising a direct current (DC) block, the DC block exhibiting a DC impedance to DC signals applied to the gate and a radio frequency (RF) impedance to RF signals applied to the gate,
- wherein the DC impedance is greater than a maximum gate termination DC impedance for the circuit at which dendrite growth occurs on the gate, and
- wherein the RF impedance is lower than a maximum gate termination RF impedance at which RF stability for the circuit is maintained.
Dependencies are inferred from the claim text.