Compliant wafer level probe assembly

A testing system for electrical devices comprising:

• a probe assembly comprising;
• a base layer of a dielectric material printed onto a surface of a fixture, the surface of the fixture having a plurality of cavities;
• a plurality of discrete contact members formed in the plurality of cavities in the fixture and coupled to the base layer;
• a plurality of conductive traces printed onto an exposed surface of the base layer and electrically coupled with proximal ends of one or more of the discrete contact members;
• a compliant layer deposited over the conductive traces and the proximal ends of the contact members;
• a protective layer deposited on the compliant layer;
• a circuit member comprising terminals compressively engaged with distal ends of the contact members, the compliant layer biasing the contact members toward terminals on a circuit member and to compensate for non-planarity of the terminals;
• and
• a test station electrically coupled to the conductive traces of the probe assembly.

A method of forming a probe assembly comprising the steps of:

• printing a base layer of a dielectric material onto a surface of a fixture;
• depositing a conductive material into a plurality of the cavities in the fixture;
• processing the conductive material to form discrete contact members with a shape generally complementary to the cavities in the fixture;
• printing a plurality of conductive traces onto an exposed surface of the base layer and so as to electrically couple the plurality of conductive traces with proximal ends of one or more of the discrete contact members;
• depositing a compliant layer over the conductive traces and the proximal ends of the discrete contact members;
• depositing a protective layer onto an exposed surface of the compliant layer;
• removing the probe assembly from the fixture to expose distal ends of the probe members;
• and
• compressively engaging distal ends of the probe members with terminals on a circuit member, the compliant layer biasing the probe members toward terminals on the circuit member and compensating for non-planarity of the terminal.