Semiconductor chips including passivation layer trench structure
AssigneeInternational Business Machines Corporation
InventorsDeepak Kulkarni, Michael W. Lane, Satyanayana V. Nitta, Shom Ponoth
Life of this patent
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Abstract
An integrated circuit including an active region a passive region and a cut line in the passive region includes a passivation layer that includes an outer nitride layer over an oxide layer. The integrated circuit also includes a crack stop below the passivation layer and in the passive region, and a solder ball in the active region. The passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer.
Claims6
An integrated circuit, the integrated circuit including an active region and a passive region, the circuit also including a cut line in the passive region, the integrated circuit comprising:
- a passivation layer that includes an outer nitride layer over an oxide layer;
- a crack stop below the passivation layer and in the passive region;
- a solder ball in the active region;
- wherein the passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer.
Dependencies are inferred from the claim text.