System, method and apparatus for leadless surface mounted semiconductor package

A method of packaging a semiconductor device (SD), comprising:

• (a) mounting a die to a first flange to form a first component;
• (b) placing a first surface of the die on the adhesive substrate with the first flange extending from a second surface of the die opposite the first surface;
• (c) placing a second flange on the adhesive substrate adjacent to but spaced apart from the first component, and the die and second flange have surfaces that are co-planar;
• (d) housing at least portions of the die and flanges by encapsulation to form an assembly;
• (e) electrically interconnecting the die and the second flange;
• (f) adding an additional conductive layer of material to surfaces of the flanges opposite the die to form a termination surface with terminations configured to be surface mounted to a circuit board without leads external to the assembly;
• and
• (g) housing the flanges and electrical interconnect such that the packaged SD has a power capacity of greater than about 30 W.

A packaged semiconductor device (SD), comprising:

• a termination surface comprising a plurality of terminations configured as leadless interconnects to be surface mounted to a circuit board;
• a first flange having a first surface and a second surface, the first surface providing a first one of the plurality of terminations, and the second surface is opposite to the first surface;
• a second flange having a first surface and a second surface, the first surface providing a second one of the plurality of terminations, and the second surface is opposite to the first surface;
• a die mounted to the second surface of the first flange with a Pb-free, die attach material having a melting point in excess of 240° C. to form a first component, wherein the die and the second flange have surfaces that are co-planar, a first surface of the die having been placed, at least temporarily, on an adhesive substrate with the first flange extending from a second surface of the die opposite the first surface, the second flange having been placed, at least temporarily, on the adhesive substrate adjacent to but spaced apart from the first component;
• and
• an electrical interconnect between the die and the second surface of the second flange opposite the termination surface, such that the electrical interconnect, first flange and second flange are substantially housed within a body such that the packaged SD has a power capacity of greater than about 30 W, wherein at least portions of the die and the flanges are encapsulated to form an assembly, wherein an additional conductive layer of material is added to surfaces of the flanges opposite the die to form a termination surface with terminations configured to be surface mounted to a circuit board without leads external to the assembly.