Replacement metal gate process for CMOS integrated circuits
AssigneeTexas Instruments Incorporated
InventorsHiroaki Niimi, Seung-Chul Song
Life of this patent
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Abstract
A complementary metal-oxide-semiconductor (CMOS) integrated circuit structure, and method of fabricating the same according to a replacement metal gate process. P-channel and n-channel MOS transistors are formed with high-k gate dielectric material that differ from one another in composition or thickness, and with interface dielectric material that differ from one another in composition or thickness. The described replacement gate process enables construction so that neither of the p-channel or n-channel transistor gate structures includes the metal gate material from the other transistor, thus facilitating reliable filling of the gate structures with fill metal.
Claims8
An integrated circuit structure formed at a semiconducting surface of a body, comprising:
- filler dielectric structures disposed at the surface;
- a first transistor, of a first channel conductivity type, comprising:
- a first pair of source/drain regions of a first conductivity type formed into a region of the surface of a second conductivity type, the second conductivity type opposite to the first conductivity type, the source/drain regions of the first pair spaced apart from one another to define a first channel region at the surface therebetween;
- a first interface dielectric layer overlying at least a portion of the surface of the first channel region within a first gap between filler dielectric structures;
- a first high-k dielectric material overlying the first interface dielectric layer within the first gap;
- a first metal gate material, comprised of a metal or metal compound and disposed over the first high-k dielectric material within the first gap;
- and
- a first fill metal disposed over the first metal gate material within and substantially filling the interior of the first gap;
- a second transistor, of the second channel conductivity type, comprising:
- a second pair of source/drain regions of the second conductivity type formed into a region of the surface of the first conductivity type, the source/drain regions of the second pair spaced apart from one another to define a second channel region at the surface therebetween;
- a second interface dielectric layer overlying at least a portion of the surface of the second channel region within a second gap between filler dielectric structures;
- a second high-k dielectric material overlying the second interface dielectric layer within the second gap;
- a second metal gate material, comprised of a metal or metal compound and disposed over the second high-k dielectric material within the second gap;
- and
- a second fill metal disposed over the second metal gate material within and substantially filling the interior of the second gap;
- wherein the first and second high-k dielectric material differ from one another in an attribute selected from the group consisting of thickness and composition;
- and
- wherein the first metal gate material and the second metal gate material differ from one another in composition with the first transistor being free of the second metal gate material and the second transistor being free of the first metal gate material.
Dependencies are inferred from the claim text.