Junctionless transistor

An integrated circuit comprising a semiconductor layer, the integrated circuit including:

• a first transistor comprising:
• a first gate dielectric formed on the semiconductor layer;
• a first gate conductor formed on the gate dielectric;
• a first active area in the semiconductor layer underneath the first gate dielectric, the first active area comprising a graded dopant region that is doped with a first conductivity type dopant, the graded dopant region being heavily doped with a graded profile, such that there is a heavy dopant concentration near a top surface of the semiconductor layer that gradually decreases to a lower dopant concentration near a bottom surface of the semiconductor layer;
• and
• first source and drain regions adjacent to the first active area, the first source and drain regions being heavily doped with the first conductivity type dopant, and the first source and drain regions and the first active area having the same conductivity type;
• and
• a second transistor comprising:
• a second gate dielectric formed on the semiconductor layer;
• a second gate conductor formed on the second gate dielectric;
• a second active area in the semiconductor layer underneath the second gate dielectric, the second active area being undoped;
• and
• second source and drain regions adjacent to the second active area, the second source and drain regions having a uniform dopant concentration,
• wherein the semiconductor layer consists of a single layer of a semiconducting material, and
• the first active area, the fist source region, the first drain region, the second active area, the second source region, and the second drain region are all located in the semiconductor layer.