High voltage and ultra-high voltage semiconductor devices with increased breakdown voltages

A semiconductor device comprising a lateral DMOS transistor structure having an oval shape including opposed rectilinear regions and opposed curved regions and formed over a semiconductor substrate having a top surface, said lateral DMOS transistor structure comprising:

• a conductive gate overlying and insulated from said top surface by at least a gate dielectric, said conductive gate including rectilinear gate portions and curved gate portions;
• a source region formed in said semiconductor substrate outside and adjacent said conductive gate;
• a trapped drain region formed in said semiconductor substrate, surrounded by and spaced from said conductive gate;
• an oxide region formed in and above said top surface, said oxide region including a thickness greater than a gate dielectric thickness and extending from said drain region to a location beneath said conductive gate;
• and
• a dielectric material formed over said oxide region and between said conductive gate and said drain region and including therein a lower group of conductive leads isolated from one another and an upper group of conductive leads isolated from one another, disposed over the lower group of conductive leads, and overlapping at least portions of said lower group of conductive leads.