Semiconductor transistor having trench contacts and method for forming therefor
AssigneeInfineon Technologies Austria AG
InventorsMartin Poelzl, Georg Ehrentraut
Life of this patent
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Abstract
Embodiments described herein relate to semiconductor transistors having trench contacts, in particular to semiconductor transistors having a field electrode below a gate electrode, and to related methods for producing semiconductor transistors having trench contacts.
Claims23
A method for producing a semiconductor transistor component, comprising:
- providing a semiconductor body with a first surface defining a vertical direction;
- defining an active area, a first contact area and a second contact area;
- forming vertical trenches in the semiconductor body so that, in a vertical cross-section, a first vertical trench, a second vertical trench and a third vertical trench extend from the first surface into the semiconductor body, the first vertical trench being formed in the active area, the second vertical trench being formed in the first contact area, and the third vertical trench being formed in the second contact area;
- forming respective first conductive regions in the second vertical trench and in a lower portion of the first vertical trench so that the first conductive region in the second vertical trench extends above the first surface;
- forming respective second conductive regions in an upper portion of the first vertical trench and in an upper portion of the third vertical trench;
- forming an insulation layer in the first vertical trench, in the third vertical trench and on the first surface so that the insulation layer has a first recess above the second conductive region of the first vertical trench, a second recess above the second conductive region of the third vertical trench and a protrusion above the first conductive region of the second vertical trench;
- depositing a polycrystalline semiconductor layer on the insulation layer;
- and
- anisotropic etching the polycrystalline semiconductor layer to partly recess the insulation layer in the second recess while the insulation layer beneath the first recess remains covered.
A method for producing a semiconductor transistor, comprising:
- providing a semiconductor arrangement comprising a semiconductor body with a first surface;
- forming a first vertical trench, a second vertical trench and a third vertical trench from the first surface into the semiconductor body so that, in a vertical cross-section which is substantially orthogonal to the first surface, the first vertical trench has a first width, the second vertical trench has a second width, and the third vertical trench has a third width which is larger than at least one of the first width and the second width;
- forming a first contact electrode in the second vertical trench that extends above the first surface;
- forming at least in a lower portion of the first vertical trench a field electrode that is, in the vertical cross-section, completely insulated, wherein the first contact electrode and the field electrode are formed by a common process of depositing a conductive material;
- forming a gate electrode in an upper portion of the first vertical trench and a gate contact electrode in an upper portion of the third vertical trench;
- depositing an insulation layer on the first surface so that the insulation layer comprises a first recess above the gate electrode, a second recess above the gate contact electrode and a protrusion above the first contact electrode;
- depositing a mask layer on the insulation layer which is selectively etchable with respect to the insulation layer;
- and
- etching the mask layer with respect to the insulation layer such that the insulation layer is partly recessed on the protrusion and in a central portion of the second recess while the insulation layer beneath the first recess remains covered by the mask layer.
A semiconductor transistor, comprising a semiconductor body with a first surface defining a vertical direction, and in a vertical cross-section the semiconductor transistor further comprising:
- an active area comprising at least a first vertical trench extending from the first surface into the semiconductor body and comprising in a lower portion a field electrode and in an upper portion a gate electrode, the at least one first vertical trench having a first width;
- a first contact area comprising at least a second vertical trench extending from the first surface into the semiconductor body, the at least one second vertical trench having a second width, and a first contact electrode that extends above the first surface and is in electric contact with the field electrode;
- a second contact area comprising a third vertical trench extending from the first surface into the semiconductor body, the third vertical trench comprising in an upper portion a gate contact electrode in electric contact with the gate electrode, the third vertical trench having a third width which is larger than at least one of the first width and the second width;
- and
- an HDP-oxide partly arranged in the at least one first vertical trench and in the third vertical trench and has at least one of a protrusion above the first contact electrode, a first recess above the gate electrode, and a second recess above the gate contact electrode,
- wherein the first contact area comprises two second vertical trenches, and wherein a further recess of the HDP-oxide is formed above a mesa of the semiconductor body between the two second vertical trenches.
Dependencies are inferred from the claim text.