P-type control gate in non-volatile storage

A non-volatile storage system, comprising:

• non-volatile storage elements, an individual non-volatile storage element includes:
• a floating gate formed from an n-type semiconductor;
• inter-poly dielectric;
• and
• a control gate that includes a lower portion formed from a p-type semiconductor and an upper portion formed from the n-type semiconductor, the inter-poly dielectric resides between the floating gate and the control gate, wherein the control gate is highly doped such that a p-n junction between the upper portion and the lower portion will break down during programming.

A non-volatile storage system, comprising:

• non-volatile storage elements, an individual non-volatile storage element includes:
• a floating gate formed from an n-type semiconductor;
• inter-poly dielectric;
• and
• a control gate that includes a lower portion formed from a p-type semiconductor and an upper portion formed from the n-type semiconductor, the inter-poly dielectric resides between the floating rate and the control gate;
• and
• a transistor having a control gate that includes a continuous region of the n-type semiconductor in a region that coincides with the floating gates, the inter-poly dielectric and the control gates of the non-volatile storage elements.

A non-volatile storage system, comprising:

• non-volatile storage elements, an individual non-volatile storage element includes:
• a floating gate formed from an n-type semiconductor;
• inter-poly dielectric;
• and
• a control gate formed from a p-type semiconductor;
• and
• a select transistor associated with the non-volatile storage elements, the select transistor includes:
• a control gate that includes a lower portion of the n-type semiconductor and an upper portion of the p-type semiconductor;
• and
• a conductive barrier layer between the lower portion and the upper portion of the control gate of the select transistor.

A non-volatile storage system, comprising:

• a NAND string of non-volatile storage elements, an individual non-volatile storage element includes:
• a floating gate formed from an n-type semiconductor;
• inter-poly dielectric;
• and
• a control gate that includes a lower portion formed from a p-type semiconductor and an upper portion formed from the n-type semiconductor, the inter-poly dielectric resides between the floating gate and the control gate;
• a select transistor associated with the NAND string, the select transistor including:
• a control gate that includes a continuous region of the n-type semiconductor in a region that coincides with the floating gates, the inter-poly dielectric and the control gates of the non-volatile storage elements.