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US 8,803,125 B2Granted
Cross-point memory utilizing Ru/Si diode
AssigneeMicron Technology, Inc.
InventorsNirmal Ramaswamy, Kirk D. Prall
Life of this patent
Estimating the term…
Abstract
Memory devices utilizing memory cells including a resistive element and a diode coupled in series between two conductors. The diodes include a ruthenium material and a silicon material. The diodes further include an interface on the silicon material of ruthenium or ruthenium silicide. A ruthenium silicide interface may be a polycrystalline ruthenium silicide.
Claims24
A memory cell, comprising:
- a first conductor;
- a second conductor;
- a resistive element coupled between the first conductor and the second conductor, and comprising a first electrode, a material capable of variable resistivity, and a second electrode between the second conductor and the material capable of variable resistivity, wherein an interface between the material capable of variable resistivity and a particular one of the electrodes of the resistive element extends across a full surface of the particular one of the electrodes;
- and
- a diode coupled in series with the resistive element between the first conductor and the second conductor;
- wherein the diode comprises a ruthenium material and a silicon material;
- wherein the diode further comprises an interface on the silicon material selected from the group consisting of a ruthenium interface on the silicon material and a ruthenium silicide interface on the silicon material;
- wherein the diode is between the resistive element and the first conductor;
- wherein the material capable of variable resistivity is in contact with adjacent memory cells in a direction of the first conductor and adjacent memory cells in a direction of the second conductor;
- and
- wherein the diode is in contact with the adjacent memory cells in the direction of the first conductor, but not the adjacent memory cells in the direction of the second conductor.
8 more elements
A memory cell, comprising:
- a first conductor;
- a second conductor;
- a resistive element coupled between the first conductor and the second conductor, and comprising a first electrode, a material capable of variable resistivity, and a second electrode between the second conductor and the material capable of variable resistivity, wherein an interface between the material capable of variable resistivity and the first electrode extends across a full surface of the first electrode;
- and
- a diode coupled in series with the resistive element between the first conductor and the second conductor;
- wherein the diode comprises a ruthenium material and a silicon material;
- wherein the diode further comprises an interface on the silicon material selected from the group consisting of a ruthenium interface on the silicon material and a ruthenium silicide interface on the silicon material;
- wherein the diode is between the resistive element and the first conductor;
- and
- wherein the material capable of variable resistivity is isolated from adjacent memory cells in a direction of the first conductor and adjacent memory cells in a direction of the second conductor.
7 more elements
A memory cell, comprising:
- a first conductor;
- a second conductor;
- a resistive element coupled between the first conductor and the second conductor, wherein the resistive element comprises a first electrode, a second electrode, and a material capable of variable resistivity between the first electrode and the second electrode, and wherein an interface between the material capable of variable resistivity and a particular one of the electrodes of the resistive element extends across a full surface of the particular one of the electrodes;
- and
- a diode coupled in series with the resistive element between the first conductor and the second conductor;
- wherein the diode comprises a ruthenium material and a silicon material;
- wherein the diode further comprises an interface on the silicon material selected from the group consisting of a ruthenium interface on the silicon material and a ruthenium silicide interface on the silicon material;
- and
- wherein the diode is between the resistive element and the second conductor.
6 more elements
A memory device, comprising:
- an array of memory cells;
- a plurality of access lines;
- and
- a plurality of data lines;
- wherein at least one of the memory cells is formed at an intersection of an associated access line of the plurality of access lines and an associated data line of the plurality of data lines, the at least one memory cell comprising:
- a resistive element coupled between the associated access line and the associated data line, wherein the resistive element comprises a first electrode, a second electrode, and a material capable of variable resistivity between the first electrode and the second electrode, and wherein an interface between the material capable of variable resistivity and a particular one of the electrodes of the resistive element extends across a full surface of the particular one of the electrodes;
- and
- a diode coupled in series with the resistive element between the associated data line and the resistive element;
- wherein the diode comprises an interface on the silicon material between the ruthenium material and the silicon material, the interface selected from the group consisting of a ruthenium interface on the silicon material and a ruthenium silicide interface on the silicon material;
- and
- wherein the silicon material is between the interface and the resistive element;
- wherein the material capable of variable resistivity is in contact with adjacent memory cells in a direction of the associated data line and adjacent memory cells in a direction of the associated access line;
- and
- wherein the diode of the at least one memory cell is in contact with the adjacent memory cells in the direction of the associated data line, but not the adjacent memory cells in the direction of the associated access line.
11 more elements
A memory device, comprising:
- an array of memory cells;
- a plurality of access lines;
- and
- a plurality of data lines;
- wherein at least one of the memory cells is formed at an intersection of an associated access line of the plurality of access lines and an associated data line of the plurality of data lines, the at least one memory cell comprising:
- a resistive element coupled between the associated access line and the associated data line, wherein the resistive element comprises a first electrode, a second electrode, and a material capable of variable resistivity between the first electrode and the second electrode, and wherein an interface between the material capable of variable resistivity and a particular one of the electrodes of the resistive element extends across a full surface of the particular one of the electrodes;
- and
- a diode coupled in series with the resistive element between the associated data line and the resistive element;
- wherein the diode comprises an interface on the silicon material between the ruthenium material and the silicon material, the interface selected from the group consisting of a ruthenium interface on the silicon material and a ruthenium silicide interface on the silicon material;
- and
- wherein the silicon material is between the interface and the resistive element;
- wherein the material capable of variable resistivity of the at least one memory cell is isolated from adjacent memory cells in a direction of the associated data line and adjacent memory cells in a direction of the associated access line, and wherein the diode is isolated from the adjacent memory cells in the direction of the associated data line and the adjacent memory cells in the direction of the associated access line.
9 more elements
A memory device, comprising:
- an array of memory cells;
- a plurality of access lines;
- and
- a plurality of data lines;
- wherein at least one of the memory cells is formed at an intersection of an associated access line of the plurality of access lines and an associated data line of the plurality of data lines, the at least one memory cell comprising:
- a resistive element coupled between the associated access line and the associated data line, wherein the resistive element comprises a first electrode, a second electrode, and a material capable of variable resistivity between the first electrode and the second electrode, and wherein an interface between the material capable of variable resistivity and a particular one of the electrodes of the resistive element extends across a full surface of the particular one of the electrodes;
- and
- a diode coupled in series with the resistive element between the resistive element and the associated access line;
- wherein the diode comprises an interface on the silicon material between the ruthenium material and the silicon material, the interface selected from the group consisting of a ruthenium interface on the silicon material and a ruthenium silicide interface on the silicon material;
- and
- wherein the silicon material is between the interface and the associated access line;
- wherein the material capable of variable resistivity of the at least one memory cell is in contact with adjacent memory cells in a direction of the associated data line and adjacent memory cells in a direction of the associated access line;
- and
- wherein the diode of the at least one memory cell is in contact with the adjacent memory cells in the direction of the associated access line, but not the adjacent memory cells in the direction of the associated data line.
11 more elements
A memory device, comprising:
- an array of memory cells;
- a plurality of access lines;
- and
- a plurality of data lines;
- wherein at least one of the memory cells is formed at an intersection of an associated access line of the plurality of access lines and an associated data line of the plurality of data lines, the at least one memory cell comprising:
- a resistive element coupled between the associated access line and the associated data line, wherein the resistive element comprises a first electrode, a second electrode, and a material capable of variable resistivity between the first electrode and the second electrode, and wherein an interface between the material capable of variable resistivity and a particular one of the electrodes of the resistive element extends across a full surface of the particular one of the electrodes;
- and
- a diode coupled in series with the resistive element between the resistive element and the associated access line;
- wherein the diode comprises an interface on the silicon material between the ruthenium material and the silicon material, the interface selected from the group consisting of a ruthenium interface on the silicon material and a ruthenium silicide interface on the silicon material;
- and
- wherein the silicon material is between the interface and the associated access line;
- wherein the material capable of variable resistivity of the at least one memory cell is isolated from adjacent memory cells in a direction of the associated data line and adjacent memory cells in a direction of the associated access line.
9 more elements
Dependencies are inferred from the claim text.