Methods of forming reverse mode non-volatile memory cell structures

A method of forming a reverse mode non-volatile memory cell structure, comprising:

• forming a first and second source/drain regions on a substrate, the first and second source/drain regions defining an intervening channel region;
• forming a charge blocking layer over the channel region;
• forming a trapping layer over the charge blocking layer;
• forming a tunnel insulator layer of three sub-layers over the trapping layer, wherein the three sub-layers comprise layers of increasing conduction band offset;
• and
• forming a control gate over the tunnel insulator layer;
• wherein a first, second, and third sub-layers of the three sub-layers are one of SiO2, SiN, and HfO2;
• SiO2, HfO2, and Pr2O3;
• SiO2, HfO2, and TiO2;
• SiO2, oxygen-rich SiON (refractive index of approximately 1.5), and HfO2;
• and SiO2, Al2O3, and HfO2.

A method of forming a reverse mode non-volatile memory cell structure, comprising:

• forming a first and second source/drain regions on a substrate, the first and second source/drain regions defining an intervening channel region;
• forming a charge blocking layer of one or more sub-layers of high K dielectric over the channel region;
• forming a trapping layer over the charge blocking layer;
• forming a tunnel insulator layer of two or more sub-layers over the trapping layer, wherein the two or more sub-layers comprise layers of increasing conduction band offset;
• and
• forming a control gate over the tunnel insulator layer;
• wherein forming a charge blocking layer of one or more sub-layers of high K dielectric further comprises forming the one or more sub-layers of one of hafnium oxide (HfO2), alumina (Al2O3), praseodymium oxide (Pr2O3), and titanium oxide (TiO2).

A method of forming a reverse mode non-volatile memory cell structure, comprising:

• forming a charge blocking layer over a channel region;
• forming a trapping layer over the charge blocking layer;
• forming a tunnel insulator layer of two sub-layers over the trapping layer, wherein the two sub-layers comprise layers of increasing conduction band offset;
• and
• forming a control gate over the tunnel insulator layer;
• wherein a first and second sub-layers of the two sub-layers are one of SiO2 and Pr2O3, SiO2 and TiO2, and SiO2 and HfO2.

A method of forming a reverse mode non-volatile memory cell structure, comprising:

• forming a charge blocking layer over a channel region;
• forming a trapping layer over the charge blocking layer;
• forming a tunnel insulator layer of three sub-layers over the trapping layer, wherein the three sub-layers comprise layers of increasing conduction band offset;
• and
• forming a control gate over the tunnel insulator layer;
• wherein a first, second, and third sub-layers of the three sub-layers are one of SiO2, SiN, and HfO2;
• SiO2, HfO2, and Pr2O3;
• SiO2, HfO2, and TiO2;
• SiO2, oxygen-rich SiON (refractive index of approximately 1.5), and HfO2;
• and SiO2, Al2O3, and HfO2.