Methods for temporary wafer molding for chip-on-wafer assembly

A method for semiconductor packaging, the method comprising:

• bonding one or more semiconductor die to a semiconductor wafer;
• applying a temporary mold material to the one or more bonded semiconductor die;
• after said bonding one or more semiconductor die and said applying a temporary mold material, backside processing said semiconductor wafer;
• singulating said baskside processed semiconductor wafer to generate a plurality of assemblies, each comprising at least one of the bonded one or more semiconductor die, at least a portion of the semiconductor wafer, and at least a portion of the temporary mold material;
• bonding one or more of said plurality of assemblies to one or more packaging substrates;
• removing said temporary mold material;
• electrically testing the bonded one or more semiconductor die;
• and
• bonding one or more additional die to one or more of said plurality of assemblies based on the electrical testing.

A method for semiconductor packaging, the method comprising:

• bonding one or more semiconductor die to an interposer wafer, wherein at least on said one or more semiconductor comprises a central processor unit;
• applying a temporary mold material to encapsulate the one or more bonded semiconductor die;
• after said bonding one or more semiconductor die and said applying a temporary mold material, backside processing said interposer wafer;
• singulating said interposer wafer to generate a plurality of assemblies each comprising at least one of the bonded one or more semiconductor die and an interposer die;
• bonding one or more of said plurality of assemblies to one or more packaging substrates;
• removing said temporary mold material;
• electrically testing the bonded one or more semiconductor die;
• and
• bonding one or more dynamic random access memory (DRAM) die to one or more of said plurality of assemblies based on the electrical testing.