Memory device, host device, memory system, memory device control method, host device control method and memory system control method

A host device to which a connectable device is connectable, comprising:

• a first I/O cell that can transmit a command signal via a command/response signal line, transmit a clock signal via a clock signal line, receive a response signal via the command/response signal line, and transmit and receive a data signal via data signal lines at any one signal voltage selected from a first voltage and a second voltage which is lower than the first voltage;
• a first regulator that can output the first voltage and the second voltage;
• and
• a host control section that sends, when switching the signal voltage from the first voltage to the second voltage, information indicating that the signal voltage will be switched with the command signal,
• starts, when the connectable device can switch the signal voltage, after setting the clock signal line at a ground level, processing for switching a voltage outputted by the first regulator from the first voltage to the second voltage,
• supplies the clock signal of the second voltage to the clock signal line after a predetermined time has lapsed since the setting of the clock signal line at the ground level, and
• starts transmission/reception at the signal voltage of the second voltage, when detecting that the data signal lines are not at the ground level.

A system comprising:

• a host device, and a connectable device which is connectable to the host device,
• the connectable device comprising:
• a first I/O cell that can receive a command signal via a command/response signal line, receive a clock signal via a clock signal line, transmit a response signal via the command/response signal line, and transmit and receive a data signal via data signal lines at any one signal voltage selected from a first voltage and a second voltage which is lower than the first voltage;
• and
• a first regulator that can output the first voltage and the second voltage,
• the host device comprising:
• a second I/O cell that can transmit the command signal via the command/response signal line, transmit the clock signal via the clock signal line, receive the response signal via the command/response signal line, and transmit and receive the data signal via the data signal lines at any one signal voltage selected from the first voltage and the second voltage;
• and
• a second regulator that can output the first voltage and the second voltage, wherein
• the host device transmits, when switching the signal voltage from the first voltage to the second voltage, the command signal requesting switching of the signal voltage to the connectable device,
• the connectable device sends information indicating whether or not switching of the signal voltage is possible to the host device with the response signal at the first voltage,
• when the connectable device can switch the signal voltage, after the clock signal is set at a ground level by the host device, the connectable device and the host device start processing for switching voltages outputted from the first regulator and the second regulator from the first voltage to the second voltage,
• the host device supplies, after a predetermined time has elapsed since the setting of the clock signal line at the ground level, the clock signal of the second voltage to the clock signal line set at the ground level,
• the connectable device applies, when detecting that a voltage other than a ground level is applied to the clock signal line, the second voltage to the command/response signal line and the data signal lines set at the ground level, and
• the host device starts, after detecting that the data signal lines are not at the ground level, transmission/reception at the second voltage.