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US 8,799,585 B2Granted
Cache memory capable of adjusting burst length of write-back data in write-back operation
AssigneeSamsung Electronics Co., Ltd.
InventorsKil Whan Lee, Young Jin Chung
Life of this patent
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Abstract
A cache memory includes a write-back determination unit and a burst length determination unit. The write-back determination unit determines whether a block is a write-back block based on an n-bit dirty value of the block. The burst length determination unit determines a burst length of write-back data included in the write-back block based on the n-bit dirty value and an minimum burst length, when the block is the write-back block.
Claims14
A cache memory comprising:
- a write-back determination unit determining whether a block is a write-back block based on replacement information on the block;
- a burst length determination unit determining a burst length of write-back data included in the write-back block based on a number of effective bits of a n-bit dirty value, an order of the effective bits with respect to non-effective bits of the n-bit dirty value, wherein each bit is in direct correlation with an updated block to be written back, and a minimum burst length, when the block is the write-back block;
- and
- a processor outputting a first output signal for controlling a data storing unit to output the write-back data in response to the determined burst length and outputting a second output signal for performing a read operation to a system bus.
1 more element
A method of operating a cache memory comprising:
- determining whether a block is a write-back block based on replacement information on the block;
- determining a burst length of write-back data included in the write-back block based on a number of effective bits of a n-bit dirty value, an order of the effective bits with respect to non-effective bits of the n-bit dirty value, wherein each bit is in direct correlation with an updated block to be written back, and a minimum burst length, when the block is the write-back block;
- and
- outputting a first output signal for controlling a data storing unit to output the write-back data in response to the determined burst length and outputting a second output signal for performing a read operation to a system bus.
1 more element
Dependencies are inferred from the claim text.