Atomic execution over accesses to multiple memory locations in a multiprocessor system

A central processing unit within a multiple processor system sharing a shared memory and performing a sequence of memory access operations, the central processing unit comprising:

• a processor status flag settable between a first state and a second state;
• a local cache for storing a subset of shared data accessed by multiple processors;
• a processor configured to:
• set the processor status flag into the first state;
• execute, subsequently to the setting the processor status flag, a sequence of program instructions comprising at least one instruction accessing selected data elements within the local cache;
• determine a modification by a remote processor of shared data corresponding to data stored within the local cache by:
• determining a modification of data corresponding to a single line of local cache;
• and
• determining that the single line of local cache stores at least some of the selected data elements;
• based on determining that the single line of local cache stores at least some of the selected data elements, set, while executing the sequence of program instructions, the processor status flag into a second state;
• and
• subsequent to the executing the sequence of program instructions and based on the processor status flag being in the first state, output a control to select execution of a first program.

A computer program product for performing a sequence of memory access operations on a processor sharing a shared memory system within a multiple processor system, the computer program product comprising:

• a non-transitory computer readable storage device having computer readable program code embodied therewith, the computer readable program code comprising:
• computer readable program code configured to set a flag into a first state;
• computer readable program code configured to execute, by a first processor subsequent to the setting the flag, a sequence of program instructions comprising at least one instruction accessing selected data elements within a local cache of the first processor, the local cache storing a subset of shared data accessed by multiple processors;
• computer readable program code configured to determine a modification by a second processor of the subset of shared data, the computer readable program code configured to determine a modification comprises:
• a modification of data corresponding to a single line of local cache maintained by the first processor;
• and
• computer readable program code configured to determine that the single line of local cache stores at least some of the selected data elements;
• computer readable program code configured to, based on the determining that the single line of local cache stores at least some of the selected data elements, set, during the executing, the flag into a second state;
• and
• computer readable program code configured to, subsequent to the executing the sequence of program instructions and based on the flag being in the first state, output a control to select execution of a first program.