US 8,799,544 B2 · System on chip and transmission method under AXI bus

Abstract

A system on chip (soc) and A transmission method under Advanced eXtensible Interface (AXI) bus are disclosed. The system includes a master device, a first extending module, a first interconnection structure, a first subtracting module, a second interconnection structure, and a slave device. The first extending module is configured to add N bits into an identifier (ID) carried in a transmission request, where N is equal to a sum of bits added by all interconnection structures in a longest loop of a system into the ID carried in the transmission request that passes through the interconnection structures. The first subtracting module is configured to subtract M bits from the ID carried in the transmission request output by the first interconnection structure when a slave device to be accessed by the master device is not a slave device connected with the first interconnection structure, where M is equal to the number of bits added by the first interconnection structure into the ID carried in the transmission request that passes through the first interconnection structure. The embodiments reduce costs and avoid the problems caused by ID compression.

Claims14

Dependent claims

A system on chip, comprising:

a master device, configured to send a transmission request that carries an identifier (ID) indicating a serial number of the master device;
a first extending module, configured to add N bits into the ID carried in the transmission request, wherein N varies according to interconnection structures that the transmission request passes through and is a positive integer equal to a sum of bits added by all interconnection structures in a longest loop of the system into the ID carried in the transmission request;
a first interconnection structure, configured to add M bits into the ID carried in the transmission request output by the first extending module, wherein M is a positive integer equal to a number of bits added by the first interconnection structure into the ID carried in the transmission request that passes through the first interconnection structure;
a first subtracting module, configured to subtract M bits from the ID carried in the transmission request output by the first interconnection structure when a slave device to be accessed by the master device is not a slave device connected with the first interconnection structure;
a second interconnection structure, configured to extend the ID carried in the transmission request output by the first subtracting module, and output an extended transmission request until the transmission request is sent to the slave device to be accessed;
and
wherein the slave device is configured to receive and process the transmission request output by the second interconnection structure or an interconnection structure next to the second interconnection structure in a direction of sending the transmission request.

4 more elements

A transmission method under Advanced eXtensible Interface (AXI) bus, comprising:

receiving a transmission request that carries an identifier (ID) indicating a serial number of a master device and sent by the master device;
adding N bits into the identifier (ID) carried in the transmission request, wherein N varies according to interconnection structures that the transmission request passes through and is a positive integer equal to a sum of bits added by all interconnection structures in a longest loop of a system into the ID carried in the transmission request;
sending the transmission request that carries the ID added with N bits to a first interconnection structure;
adding, by the first interconnection structure, M bits into the ID carried in the received transmission request;
and
subtracting M bits from the ID carried in the transmission request output by the first interconnection structure when a slave device to be accessed by the master device is not a slave device connected with the first interconnection structure, wherein M is a positive integer equal to a number of bits added by the first interconnection structure into the ID carried in the transmission request that passes through the first interconnection structure;
and
sending the transmission request that carries the ID shortened by M bits to a second interconnection structure to access the slave device.

5 more elements

A transmission method under Advanced eXtensible Interface (AXI) bus, comprising:

adding M bits into an identifier (ID) carried in a transmission response output by a second interconnection structure when a slave device intends to access a master device connected with a first interconnection structure, wherein M is a positive integer equal to a number of bits added by the first interconnection structure into an ID carried in a corresponding transmission request that passes through the first interconnection structure;
and sending the transmission response that carries the ID added with M bits to the first interconnection structure;
subtracting, by the first interconnection structure, M bits from the ID carried in a received transmission response;
and
subtracting N bits from the ID carried in the transmission response output by the first interconnection structure, wherein N varies according to interconnection structures that the transmission request passes through and is a positive integer equal to a sum of bits added by all interconnection structures in a longest loop of a system into the ID carried in the transmission request;
and
sending the transmission response that carries the ID shortened by N bits to the master device.

4 more elements

Dependencies are inferred from the claim text.

System on chip and transmission method under AXI bus

Life of this patent

System on chip and transmission method under AXI bus

Life of this patent

Abstract

Claims14