Data processing system with a host bus adapter (HBA) running on a PCIe bus that manages the number enqueues or dequeues of data in order to reduce bottleneck
AssigneeHitachi, Ltd.
InventorsTakafumi Maruyama, Megumu Hasegawa
Life of this patent
Estimating the term…
Abstract
An HBA driver manages a queue number for enqueuing and dequeuing data to an I/O queue by the main storage, and HBA-F/W manages a storage region at inside of HBA. The HBA driver reduces the number of access times by way of the PCIe bus by noticing an enqueued queue number or a dequeued queue number of an I/O queue to HBA-F/W by utilizing an MMIO area of the main storage in which a storage region on HBA is mapped.
Claims15
An input/output control method of a computer comprising CPU, a main storage connected to the CPU via a bridge, and a host bus adapter (HBA) connected to the CPU and the main storage via a PCIe bus connected to the bridge for transmitting and receiving a data to and from an I/O device,
- wherein the HBA comprises an HBA firmware and a storage region,
- wherein the CPU executes an OS and an HBA driver operated on the OS for controlling the HBA,
- wherein the main storage comprises an I/O queue from which the data is enqueued or dequeued, a management queue of managing a queue number of the data which is enqueued or dequeued from the I/O queue, an Memory Mapped I/O (MMIO) area in which a storage region of the HBA is mapped,
- wherein the HBA driver writes a piece of management information of an updated management queue to the MMIO area when the management queue is updated, and
- wherein the OS writes the piece of management information written to the MMIO area to a storage region of the HBA in correspondence with the MMIO area of the main storage.
A computer comprising:
- a host bus adapter (HBA) including an HBA firmware and a storage region and transmitting and receiving a data to and from an I/O device;
- a CPU executing an OS and an HBA driver operated on the OS and controlling the HBA;
- a main storage including an I/O queue from which the data is enqueued or dequeued, a management queue managing a queue number of the data enqueued or dequeued from the I/O queue, and an Memory Mapped I/O (MMIO) area by which a storage region of the HBA is mapped and connected to the CPU via a bridge;
- and
- a PCIe bus connecting the CPU, the main storage, and the HBA via the bridge,
- wherein when the management queue is updated, the HBA drives writes a piece of management information of the updated management queue to the MMIO area, and
- wherein the OS writes the piece of management information written to the MMIO area to a storage region of the HBA in correspondence with the MMIO area of the main storage.
Dependencies are inferred from the claim text.