Comparator unit for comparing values of floating point operands

A computer implemented method for comparing a first floating point operand to a second floating point operand, wherein each floating point operand includes encoded floating point status information, the method comprising:

• receiving the first floating point operand in a first operand buffer of a computer system;
• receiving the second floating point operand in a second operand buffer of the computer system;
• determining from the first floating point operand in the first operand buffer a first format of the first floating point operand based on the encoded floating point status information in the first floating point operand, wherein the determining from the first floating point operand step is performed by a first analysis circuit of the computer system;
• determining from the second floating point operand in the second operand buffer a second format of the second floating point operand based on the encoded floating point status information in the second floating point operand, wherein the determining from the second floating point operand step is performed by a second analysis circuit of the computer system;
• generating a first signal representative of the first format, wherein the first signal is generated by analyzing the first floating point operand in the first operand buffer, wherein the first signal is generated by the first analysis circuit of the computer system;
• generating a second signal representative of the second format, wherein the second signal is generated by analyzing the second floating point operand in the second operand buffer, wherein the second signal is generated by the second analysis circuit of the computer system;
• and
• generating, by a result generator circuit of the computer system, a result indicating a comparative relationship between the first floating point operand and the second floating point operand, based at least on the first signal and the second signal received by the result generator circuit from the first and second analysis circuits.

A tangible computer-readable medium on which is stored a set of instructions for a computer system for comparing a first floating point operand to a second floating point operand, each floating point operand having encoded floating point status information, which when executed cause the computer system to perform steps comprising:

• receiving the first floating point operand and the second floating point operand;
• determining a first format of the first floating point operand based on the encoded floating point status information in the first floating point operand;
• determining a second format of the second floating point operand based on the encoded floating point status information in the second floating point operand;
• and
• generating a result indicating a comparative relationship between the first floating point operand and the second floating point operand, based at least on the first format and the second format.