Adaptive offset-compensating decision-feedback receiver

A computer system, comprising a semiconductor die that includes a circuit, wherein the circuit includes:

• a receiver circuit, having inputs electrically coupled to receiver proximity connectors, which receive input signals via proximity communication;
• a refresh circuit, electrically coupled to the inputs, configured to short the inputs to one another at least once per clock cycle;
• and
• a feedback circuit configured to provide an output value on an output node of the circuit corresponding to a signal transition in the input signals during a current clock cycle and, if there is no signal transition during the current clock cycle, to provide the output value on the output node based at least in part on the output value during an immediately preceding clock cycle,
• wherein the feedback circuit comprises:
• a multiplexer, wherein a first data input of the multiplexer is electrically coupled to an output of a first sense amplifier, wherein a second data input of the multiplexer is electrically coupled to an output of a second sense amplifier, and wherein each of the first sense amplifier and the second sense amplifier is electrically coupled to outputs from the receiver circuit;
• a delay element configured to receive an output of the multiplexer and to generate a signal on an output node of the delay circuit based on a predetermined delay, wherein the output node of the delay element is electrically coupled to the output node of the circuit;
• and
• a memory element configured to store the output value from the immediately preceding clock cycle, wherein a data input of the memory element is electrically coupled to the output of the delay circuit, and wherein an output of the memory element is electrically coupled to a select input of the multiplexer.

A method for restoring DC content during proximity communication, comprising:

• using a receiver circuit to receive input signals on inputs to a circuit via proximity communication;
• shorting the inputs to each other using a refresh circuit at least once per clock cycle;
• and
• using a feedback circuit to provide an output value on an output node of the circuit corresponding to a signal transition in the input signals during a current clock cycle and, if there is no signal transition during the current clock cycle, to provide the output value on the output node based on the output value during an immediately preceding clock cycle,
• wherein the feedback circuit comprises:
• a multiplexer, wherein a first data input of the multiplexer is electrically coupled to an output of a first sense amplifier, wherein a second data input of the multiplexer is electrically coupled to an output of a second sense amplifier, and wherein each of the first sense amplifier and the second sense amplifier is electrically coupled to outputs from the receiver circuit;
• a delay element configured to receive an output of the multiplexer and to generate a signal on an output node of the delay circuit based on a predetermined delay, wherein the output node of the delay element is electrically coupled to the output node of the circuit;
• and
• a memory element configured to store the output value from the immediately preceding clock cycle, wherein a data input of the memory element is electrically coupled to the output of the delay circuit, and wherein an output of the memory element is electrically coupled to a select input of the multiplexer.