Synchronizing receivers in a signal acquisition system

A non-transitory computer-readable memory medium for synchronizing a plurality of receiver channels, wherein the memory medium stores program instructions, wherein the program instructions, when executed by a computer system, cause the computer system to:

• calibrate the plurality of receiver channels, wherein said calibrating synchronizes the plurality of receiver channels, wherein one of the receiver channels is designated as a master channel, wherein the one or more remaining receiver channels are designated as slave channels, wherein each of the receiver channels includes a signal path that is configured to:
• down-convert a respective input signal to obtain a respective IF (intermediate frequency) signal, digitize the respective IF signal based on a respective sample clock to obtain a respective IF sample sequence, digitally down-convert the respective IF sample sequence to obtain a respective baseband sample sequence;
• wherein said calibrating the plurality of receiver channels includes, for each of the slave channels:
• computing a relative frequency response between the slave channel and the master channel, wherein the relative frequency response is based on the respective baseband sample sequence of the slave channel and the respective baseband sample sequence of the master channel;
• computing a digital filter for the slave channel based on the relative frequency response, wherein the digital filter is configured to compensate for non-uniformity in amplitude of the relative frequency response and for a deviation of phase of the relative frequency response from a linear approximation of the phase of the relative frequency response;
• programming a digital circuit of the slave channel to implement the digital filter, wherein, after said programming, the digital circuit of the slave channel applies the digital filter to the respective IF sample sequence prior to said digital down-converting of the respective IF sample sequence.

A computer system for synchronizing a plurality of receiver channels, the computer system comprising:

• a processor;
• and
• memory storing program instructions, wherein the program instructions, when executed by the processor, cause the processor to:
• calibrate the plurality of receiver channels, wherein said calibrating synchronizes the plurality of receiver channels, wherein one of the receiver channels is designated as a master channel, wherein the one or more remaining receiver channels are designated as slave channels, wherein each of the receiver channels includes a signal path that is configured to:
• down-convert a respective input signal to obtain a respective IF (intermediate frequency) signal, digitize the respective IF signal based on a respective sample clock to obtain a respective IF sample sequence, digitally down-convert the respective IF sample sequence to obtain a respective baseband sample sequence, wherein said calibrating the plurality of receiver channels includes, for each of the slave channels:
• computing a relative frequency response between the slave channel and the master channel, wherein the relative frequency response is based on the respective baseband sample sequence of the slave channel and the respective baseband sample sequence of the master channel;
• computing a digital filter for the slave channel based on the relative frequency response, wherein the digital filter is configured to compensate for non-uniformity in amplitude of the relative frequency response and for a deviation of phase of the relative frequency response from a linear approximation of the phase of the relative frequency response;
• and
• programming a digital circuit of the slave channel to implement the digital filter, wherein, after said programming, the digital circuit of the slave channel applies the digital filter to the respective IF sample sequence prior to said digital down-converting of the respective IF sample sequence.

A computer-implemented method for synchronizing a second receiver with respect to a first receiver, the method comprising:

• calibrating the second receiver, wherein said calibrating synchronizes the second receiver to the first receiver, wherein each receiver includes a signal path that is configured to:
• receive a respective input signal, down-convert the respective input signal to obtain a respective IF signal, digitize the respective IF signal based on a respective sample clock to obtain a respective IF sample sequence, digitally down-convert the respective IF sample sequence to obtain a respective baseband sample sequence, wherein said calibrating the second receiver includes:
• computing a relative frequency response of the second receiver with respect to the first receiver based on the respective baseband sample sequence of the second receiver and the respective baseband sample sequence of the first receiver;
• computing a digital filter for the second receiver based on the relative frequency response, wherein the digital filter is configured to compensate for non-uniformity in amplitude of the relative frequency response and for a deviation of phase of the relative frequency response from a linear approximation of the phase of the relative frequency response;
• programming a digital circuit of the second receiver to implement the digital filter, wherein, after said programming, the digital circuit applies the digital filter to the IF sample sequence of the second receiver prior to said digital down-converting of that IF sample sequence.