Signal processing apparatus and signal processing method
AssigneeSony Corporation
InventorHidenori Takeuchi
Life of this patent
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Abstract
Disclosed herein is a signal processing apparatus including: a frequency multiplier configured to carry out an N-times frequency multiplication process on a modulated signal obtained as a result of an N phase shift keying modulation process in order to generate a multiplied frequency signal; and an oscillator configured to oscillate the multiplied frequency signal as an injected signal in order to generate a signal obtained by carrying out a by-N frequency division process on the multiplied frequency signal to serve as a reproduced carrier which is a carrier reproduced from the modulated signal.
Claims11
A signal processing apparatus comprising:
- a frequency multiplier configured to perform an N-times frequency multiplication process on a modulated signal to generate a multiplied frequency signal, wherein the modulated signal is obtained as a result of an N phase-shift keying modulation process, wherein N is greater than 1 and corresponds to a number of phases utilized in the phase-shift keying modulation process;
- and
- an oscillator configured to oscillate the multiplied frequency signal as an injected signal to generate a signal obtained by dividing a frequency of the multiplied frequency signal by N, wherein the generated signal serves as a reproduced carrier from the modulated signal, wherein the oscillator comprises a resonant circuit and a negative-resistance circuit connected to each other, and the multiplied frequency signal is injected to the negative-resistance circuit as a current flowing to the negative-resistance circuit, and wherein the negative-resistance circuit comprises a pair of transistors connected to each other to form a cross-couple connection, and the frequency multiplier is a differential amplifier making use of another pair of transistors.
A signal processing method comprising:
- performing an N-times frequency multiplication process on a modulated signal to generate a multiplied frequency signal, wherein the modulated signal is obtained as a result of an N phase-shift keying modulation process, wherein N is greater than 1 and corresponds to a number of phases utilized in the phase-shift keying modulation process;
- supplying the multiplied frequency signal to an oscillator as an injected signal;
- and
- using oscillation of the oscillator to generate a signal obtained by dividing a frequency of the multiplied frequency signal by N, wherein the generated signal serves as a reproduced carrier from the modulated signal, wherein the oscillator comprises a resonant circuit and a negative resistance circuit connected to each other, and the multiplied frequency signal is injected to the negative resistance circuit as a current flowing to the negative resistance circuit, and wherein the negative-resistance circuit comprises a pair of transistors connected to each other to form a cross-couple connection, and a frequency multiplier that generates the multiplied frequency signal is a differential amplifier making use of another pair of transistors.
A signal processing apparatus comprising:
- a frequency multiplier operable to carry out an N times frequency multiplication process on a modulated signal to generate a multiplied frequency signal, the modulated signal obtained as a result of an N phase shift keying modulation process, wherein N is greater than 1;
- and
- an oscillator operable to oscillate the multiplied frequency signal as an injected signal to generate a signal obtained by carrying out a by-N frequency division process on the multiplied frequency signal, wherein the generated signal serves as a reproduced carrier which is a carrier reproduced from the modulated signal,
- wherein the frequency multiplier carries out a two-times frequency multiplication process on a binary phase-shift keying signal in order to generate the multiplied frequency signal, and the oscillator oscillates the multiplied frequency signal as the injected signal in order to generate a signal obtained by dividing the multiplied frequency signal by two to serve as the reproduced carrier which is the carrier reproduced from the modulated signal,
- wherein the negative-resistance circuit comprises a pair of transistors connected to each other to form a cross-couple connection, and the frequency multiplier is a differential amplifier making use of a pair of transistors, wherein the oscillator comprises a resonant circuit and a negative-resistance circuit connected to each other, and the multiplied frequency signal is injected to the negative-resistance circuit as a current flowing to the negative-resistance circuit, and
- wherein the negative-resistance circuit has two field-effect transistors, the gate of a specific one of the two field-effect transistors is connected to the drain of the other one of the two field-effect transistors and the drain of the specific field-effect transistor is connected to the gate of the other field-effect transistor, the source of the specific field-effect transistor is connected to the source of the other field-effect transistor, and a signal resulting from an operation carried out by the frequency multiplier to amplify the modulated signal is supplied to a connection point between the sources of the two field-effect transistors as the multiplied frequency signal.
Dependencies are inferred from the claim text.