US 8,798,129 B2Granted

Biquad infinite impulse response system transformation

AssigneeLSI Corporation

InventorsAlexander Rabinovitch, Leonid Dubrovin

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Abstract

A BIIR system includes a first delay line for receiving at least one input data sample and generating delayed input samples as a function of the input data sample. The BIIR system further includes a second delay line including multiple delay elements connected in series for generating delayed output samples. An input of one of the delay elements receives at least one output data sample of the BIIR system. A summation element in the BIIR system generates the output data sample of the BIIR system as a function of an addition of at least first and second signals and a subtraction of at least a third signal. The third signal includes a first delayed output sample generated by the second delay line multiplied by a first prescribed value. The first delayed output sample and the output data sample are temporally nonadjacent to one another.

Claims21

Dependent claims

A biquad infinite impulse response (BIIR) system, comprising:

a first delay line configured to receive at least one input data sample and to generate a plurality of delayed input samples as a function of the input data sample;
a second delay line including a plurality of delay elements connected together in a series configuration, an input of a first one of the delay elements receiving at least one output data sample of the BIIR system, the second delay line configured to generate a plurality of delayed output samples;
and
a summation element configured to generate the at least one output data sample of the BIIR system as a function of an addition of at least a first signal and a second signal and a subtraction of at least a third signal, the third signal comprising at least a first delayed output sample generated by the second delay line multiplied by a first prescribed value, the first delayed output sample and the at least one output data sample of the BIIR system being temporally nonadjacent to one another, whereby the BIIR system is configured to eliminate a dependency between the at least one output data sample of the BIIR system and a temporally adjacent delayed output sample generated by the second delay line.

1 more element

An integrated circuit including at least one biquad infinite impulse response (BIIR) system, the at least one BIIR system comprising:

a first delay line configured to receive at least one input data sample and to generate a plurality of delayed input samples as a function of the input data sample;
a second delay line including a plurality of delay elements connected together in a series configuration, an input of a first one of the delay elements receiving at least one output data sample of the at least one BIIR system, the second delay line configured to generate a plurality of delayed output samples;
and
a summation element configured to generate the at least one output data sample of the BIIR system as a function of an addition of at least a first signal and a second signal and a subtraction of at least a third signal, the third signal comprising at least a first delayed output sample generated by the second delay line multiplied by a first prescribed value, the first delayed output sample and the at least one output data sample of the BIIR system being temporally nonadjacent to one another, whereby the BIIR system is configured to eliminate a dependency between the at least one output data sample of the BIIR system and a temporally adjacent delayed output sample generated by the second delay line.

1 more element

Dependencies are inferred from the claim text.