US 8,797,868 B2 · Energy-efficient network device with coordinated scheduling and rate control using non-zero base power

Abstract

A network device of a communication network is configured to implement coordinated scheduling and processor rate control. In one aspect, packets are received in the network device and scheduled for processing from one or more queues of that device. An operating rate of a processor of the network device is controlled based at least in part on an optimal operating rate of the processor that is determined using a non-zero base power of the processor. For example, the operating rate of the processor may be controlled such that the processor either operates at or above the optimal operating rate, or is substantially turned off. The optimal operating rate of the processor may be selected so as to fall on a tangent line of a power-rate curve of the processor that also passes through an origin point of a coordinate system of the power-rate curve.

Claims20

Dependent claims

A method comprising the steps of:

receiving packets in a network device of a communication network;
scheduling the packets for processing from one or more queues of the network device;
and
controlling an operating rate of a processor of the network device based at least in part on an optimal operating rate of the processor and a packet arrival rate;
wherein controlling the operating rate comprises at least one of adjusting a clock speed of the processor and adjusting a service rate of the processor;
wherein the optimal operating rate of the processor is determined using a non-zero base power of the processor and a tangent line of a power-rate curve of the processor that passes through an origin point of a coordinate system of the power-rate curve;
and
wherein the packet arrival rate is determined by accumulating a designated number of the received packets and computing the packet arrival rate over the accumulated packets.

5 more elements

A network device comprising:

a processor having a controllable operating rate;
a memory coupled to the processor and comprising one or more queues;
network interface circuitry configured to support communication between the network device and one or more additional devices of a communication network;
and
a control module;
wherein packets are received via the network interface circuitry and scheduled by the control module for processing from the one or more queues of the memory;
wherein the operating rate of the processor is controlled by the control module based at least in part on an optimal operating rate of the processor and a packet arrival rate;
wherein the operating rate of the processor is controlled by at least one of adjusting a clock speed of the processor and adjusting a service rate of the processor;
wherein the optimal operating rate of the processor is determined using a non-zero base power of the processor and a tangent line of a power-rate curve of the processor that passes through an origin point of a coordinate system of the power-rate curve;
and
wherein the packet arrival rate is determined by accumulating a designated number of the received packets and computing the packet arrival rate over the accumulated packets.

8 more elements

Dependencies are inferred from the claim text.

Energy-efficient network device with coordinated scheduling and rate control using non-zero base power

Life of this patent

Energy-efficient network device with coordinated scheduling and rate control using non-zero base power

Life of this patent

Abstract

Claims20