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US 8,797,804 B2Granted
Vertical memory with body connection
AssigneeMicron Technology, Inc.
InventorToru Tanzawa
Life of this patent
Estimating the term…
Abstract
An embodiment of an apparatus includes a substrate, a body semiconductor, a vertical memory access line stack over the body semiconductor, and a body connection to the body semiconductor.
Claims15
An apparatus comprising:
- a body semiconductor;
- a first vertical memory access line stack over the body semiconductor;
- a second vertical memory access line stack over the body semiconductor;
- a data line pillar connected to the body semiconductor and situated between the first vertical memory access line stack and the second vertical memory access line stack;
- a charge storage structure over the body semiconductor and situated between the data line pillar and the first vertical memory access line stack;
- a tunneling insulator over the body semiconductor and situated between the charge storage structure and the data line pillar;
- and
- a body connection to the body semiconductor, the body connection configured to couple the body semiconductor to ground.
5 more elements
A method of making an apparatus comprising:
- forming a body semiconductor;
- forming a source semiconductor over the body semiconductor;
- forming a memory access line stack over the source semiconductor;
- forming an opening through the memory access line stack and the source semiconductor to at least the body semiconductor, so as to form a first vertical memory access line stack and a second vertical memory access line stack separated by the opening;
- forming a first semiconductor pillar in the opening;
- forming a charge storage structure over the body semiconductor and between the first semiconductor pillar and the first vertical memory access line stack;
- forming a tunneling insulator over the body semiconductor and between the charge storage structure and the first semiconductor pillar;
- and
- forming a second semiconductor pillar outside a footprint of the memory access line stack to contact the body semiconductor.
6 more elements
An apparatus comprising:
- a substrate;
- a p-type body over the substrate;
- an n-type source over the body, the source including an opening extending from a top surface of the source to at least the body;
- a VNAND memory access line stack over the source, wherein the opening in the source is outside a footprint of the VNAND memory access line stack;
- a data line pillar connected to the body through the VNAND memory access line stack and the source;
- a charge storage structure situated over the body and between the data line pillar and the VNAND memory access line stack;
- a tunneling insulator situated over the body and between the charge storage structure and the data line pillar;
- a p-type body pillar connected to the body through the opening in the source;
- and
- a body contact connected to the body pillar.
7 more elements
Dependencies are inferred from the claim text.