US 8,797,800 B1 · Select gate materials having different work functions in non-volatile memory

Abstract

In a 3D stacked non-volatile memory device, multiple smaller drain-end selected gate (SGD) transistors replace one larger SGD transistor. The SGD transistors have different work functions in their control gates so that, during a programming operation, a discontinuous channel potential is created in an inhibited NAND string. The SGD transistor closest to the bit line has a higher work function so that the channel potential under it is lower, and the next SGD transistor has a lower work function so that the channel potential under it is higher. The different work functions can be provided by using different control gate materials for the SGD transistors. One option uses p+ polysilicon and n+ polysilicon to provide higher and lower work functions, respectively. Metal or metal silicide can also be used. A single SGD transistor with different control gate materials could also be used.

Claims30

Dependent claims

A non-volatile memory device, comprising:

a substrate;
a plurality of memory cells formed above the substrate in multiple physical levels of memory cells in a three-dimensional non-volatile memory;
alternating dielectric layers and conductive layers in a stack, the plurality of memory cells are in communication with the conductive layers, and a columnar active area of the plurality of memory cells is formed in the stack;
a source-end select gate transistor at a source end of the plurality of memory cells;
one or more drain-end select gate transistors at a drain end of the plurality of memory cells, the one or more drain-end select gate transistors comprise a first control gate material which has a relatively higher work function and a second control gate material which has a relatively lower work function, and the first control gate material is before the second control gate material relative to the drain end;
and
circuitry in communication with the plurality of memory cells.

4 more elements

A non-volatile memory device, comprising:

a substrate;
a plurality of memory cells formed above the substrate in multiple physical levels of memory cells in a three-dimensional non-volatile memory;
alternating dielectric layers and conductive layers in a stack, the plurality of memory cells are in communication with the conductive layers, and a columnar active area of the plurality of memory cells is formed in the stack a source-end select gate transistor at a source end of the plurality of memory cells;
a first drain-end select gate transistor at a drain end of the plurality of memory cells;
a second drain-end select gate transistor between the plurality of memory cells and the first drain-end select gate transistor, the first drain-end select gate transistor comprising a control gate material having a work function which is higher than a work function of a control gate material of the second drain-end select gate transistor;
and
circuitry in communication with the plurality of memory cells.

4 more elements

Dependencies are inferred from the claim text.

Select gate materials having different work functions in non-volatile memory

Life of this patent

Select gate materials having different work functions in non-volatile memory

Life of this patent

Abstract

Claims30