Electrostatic discharge (ESD) protection and operating method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsDa-Wei Lai, Wade Ma
Life of this patent
Estimating the term…
Abstract
An electrostatic discharge (ESD) protection circuit includes a clamp transistor, and inverter, a resistance-capacitance (RC) circuit, and a current mirror. The clamp transistor is coupled between a first supply node and a second supply node. The inverter has an input end and an output end, and the output end of the inverter is coupled with a gate of the clamp transistor. The RC circuit is coupled to the first supply node. The current mirror includes a first transistor and a second transistor. The first transistor is coupled between the input end of the inverter and the second supply node, and the second transistor is coupled between the RC circuit and the second supply node.
Claims20
An electrostatic discharge (ESD) protection circuit, comprising:
- a clamp transistor coupled between a first supply node and a second supply node;
- an inverter having an input end and an output end, the output end of the inverter being coupled with a gate of the clamp transistor;
- a resistance-capacitance (RC) circuit coupled to the first supply node, the RC circuit comprising a capacitive device;
- and
- a current mirror including a first transistor and a second transistor, the first transistor being coupled between the input end of the inverter and the second supply node, the second transistor being coupled between the RC circuit and the second supply node, and the capacitive device of the RC circuit being coupled between the input end of the inverter and the second transistor.
An electrostatic discharge (ESD) protection circuit, comprising:
- an internal node;
- a clamp transistor coupled between a first supply node and a second supply node, the clamp transistor being configured to be turned on or off responsive to a voltage stage at the internal node;
- a resistive device coupled between the first supply node and the internal node;
- a capacitive device having a first end and a second end, the first end of the capacitive device coupled to the internal node;
- and
- a current mirror comprising a first transistor and a second transistor, the first transistor being coupled between the internal node and the second supply node, and the second transistor being coupled between the second end of the capacitive device and the second supply node.
A method of operating an ESD protection circuit, the ESD protection circuit being coupled between a first supply node and a second supply node, the method comprising:
- activating a first parasitic transistor of a first transistor of a current mirror of the ESD protection circuit for coupling an input end of an inverter to the second supply node, an output end of the inverter being coupled to a clamp transistor, and the clamp transistor being coupled between the first supply node and the second supply node;
- and
- providing a voltage state on the input end of the inverter that is capable of substantially turning off the clamp transistor based on a resistance-capacitance (RC) circuit coupled between the first supply node and a second transistor of the current mirror, the RC circuit comprising a capacitive device, and the capacitive device of the RC circuit being coupled between the input end of the inverter and the second transistor.
Dependencies are inferred from the claim text.