Liquid crystal display device, and timing controller and signal processing method used in same

A timing controller for a liquid crystal display device having a liquid crystal panel having predetermined columns of data lines, predetermined rows of scanning lines, and pixels each formed at an intersection of each of said data lines and each of said scanning lines, a data line driving circuit to write, in accordance with a first controlling signal supplied in every horizontal period, pixel data based on a given data signal to each of said data lines in synchronization with a clock signal having a given frequency, and a scanning line driving circuit to output, in accordance with a given second controlling signal, a scanning line driving signal to be used for driving each of said scanning lines in a predetermined order and wherein said liquid crystal panel is divided, in a column direction, into a plurality of display regions, wherein said data line driving circuit writes pixel data, in accordance with said given data signal and in synchronization with said clock signal, in every display region of said liquid crystal panel, to each of said data lines,

• wherein said timing controller outputs, in accordance with a video signal, said first controlling signal, said given data signal, and said clock signal to said data line driving circuit and said second controlling signal to said scanning line driving circuit, sets a frequency of said clock signal in every said display region to a different value such that clock signals in said plurality of said display regions rise at a same time only once every one horizontal period, and supplies the corresponding clock signal in every said display region to said data line driving circuit.

A signal processing method for use in a liquid crystal display device having a liquid crystal panel comprising predetermined columns of data lines, predetermined rows of scanning lines, and pixels each formed at an intersection of each of said data lines and each of said scanning lines, a data line driving circuit to write, in accordance with a first controlling signal supplied in every horizontal period, pixel data based on a given data signal to each of said data lines in synchronization with a clock signal having a given frequency, a scanning line driving circuit to output, in accordance with a given second controlling signal, a scanning line driving signal to be used for driving each of said scanning lines in a predetermined order, and a control unit to output, in accordance with a video signal, said first controlling signal, said given data signal, and said clock signal to said data line driving circuit and said second controlling signal to said scanning line driving circuit, and wherein said liquid crystal panel is divided in a column direction into a plurality of display regions, wherein said data line driving circuit writes pixel data, in accordance with said given data signal and in synchronization with said clock signal, in every display region of said liquid crystal panel, to each of said data lines, said signal processing method comprising:

• clock signal frequency setting processing, in which said control unit sets a frequency of said clock signal in every said display region to a different value such that clock signals in said plurality of said display regions rise at a same time only once every one horizontal period, and supplies the corresponding clock signal in every said display region to said data line driving circuit.

A liquid crystal display device, comprising:

• a liquid crystal panel having predetermined columns of data lines, predetermined rows of scanning lines, and pixels each formed at an intersection of each of said data lines and each of said scanning lines;
• a data line driving means to write, in accordance with a first controlling signal supplied in every horizontal period, pixel data based on a given data signal to each of said data lines in synchronization with a clock signal having a given frequency;
• a scanning line driving means to output, in accordance with a given second controlling signal, a scanning line driving signal to be used for driving each of said scanning lines in a predetermined order;
• and
• a control means to output, in accordance with a video signal, said first controlling signal, said given data signal, and said clock signal to said data line driving means and said second controlling signal to said scanning line driving means,
• wherein said liquid crystal panel is divided in a column direction into a plurality of display regions,
• wherein said data line driving means writes pixel data, in accordance with said given data signal and in synchronization with said clock signal, in every display region of said liquid crystal panel, to each of said data lines, and
• wherein said control means sets a frequency of said clock signal in every said display region to a different value such that clock signals in said plurality of said display regions rise at a same time only once during each one horizontal period, and supplies the corresponding clock signal in every said display region to said data line driving means.

A timing controller to be used for a liquid crystal display device having a liquid crystal panel having predetermined columns of data lines, predetermined rows of scanning lines, and pixels each formed at an intersection of each of said data lines and each of said scanning lines, a data line driving means to write, in accordance with a first controlling signal supplied in every horizontal period, pixel data based on a given data signal to each of said data lines in synchronization with a clock signal having a given frequency, and a scanning line driving means to output, in accordance with a given second controlling signal, a scanning line driving signal to be used for driving each of said scanning lines in a predetermined order and wherein said liquid crystal panel is divided, in a column direction, into a plurality of display regions, wherein said data line driving means writes pixel data, in accordance with said given data signal and in synchronization with said clock signal, in every display region of said liquid crystal panel, to each of said data lines,

• wherein said timing controller outputs, in accordance with a video signal, said first controlling signal, said given data signal, and said clock signal to said data line driving means and said second controlling signal to said scanning line driving means, sets a frequency of said clock signal in every said display region to a different value such that clock signals in said plurality of said display regions rise at a same time once during every one horizontal period, and supplies the corresponding clock signal in every said display region to said data line driving means.