US 8,797,083 B2Granted

Methods of operating timers to inhibit timing error accumulation

AssigneeSamsung Electronics Co., Ltd.

InventorSeung Kyu Kim

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Abstract

Methods of operating timers include generating a periodic timing signal having a first frequency that differs from a desired timer frequency (1 KHz) by a first amount. This periodic timing signal having the first frequency can be generated by dividing a frequency of an input clock signal (e.g., 32.768 KHz) by N, where N is a positive integer greater than one. A typical value of N may be 32. The methods also include techniques to inhibit timing error accumulation by switching a frequency of the periodic timing signal from the first frequency to a second frequency that differs from the desired timer frequency by a second amount. This periodic timing signal having the second frequency can be generated by dividing the frequency of the input clock signal by M, where M is a positive integer unequal to N (e.g., M−N equals ±1).

Claims18

Dependent claims

A method of operating a timer, comprising:

generating a periodic timing signal having a first frequency that differs from a desired timer frequency by a first amount, by dividing a frequency of an input clock signal by N, where N is a positive integer greater than one;
switching a frequency of the periodic timing signal from the first frequency to a second frequency that differs from the desired timer frequency by a second amount, by dividing the frequency of the input clock signal by M in response to counting a first number of cycles of the periodic timing signal having the first frequency, where M is a positive integer unequal to N and where M−N equals ±K, wherein K is a positive integer;
and
switching the frequency of the periodic timing signal from the second frequency to the first frequency in response to counting a second number of cycles of the periodic timing signal having the second frequency, where the second number is unequal to the first number;
wherein a first error value equals an absolute value of a difference between an accumulated duration of the first number of cycles and a duration of a target cycle and a second error value equals an absolute value of a difference between an accumulated duration of the second number of cycles and the duration of the target cycle;
wherein the first number and the second number are determined by the first error value and the second error value;
wherein the first number is equivalent to a ratio of a least common multiple of the first error value and the second error value, to the first error value;
and
wherein the second number is equivalent to a ratio of the least common multiple of the first error value and the second error value to the second error value.

6 more elements

A method of compensating an error of a timer, the method comprising:

generating a tick at a first cycle that is shorter than a target cycle by counting a clock signal i times, or generating a tick at a second cycle that is longer than the target cycle by counting the clock signal j times, wherein i and j are natural numbers equal to or greater than 2;
counting the tick generated at the first cycle m times or counting the tick generated at the second cycle n times, wherein m and n are natural numbers equal to or greater than 2, and outputting a result of counting of the tick generated at the first cycle and the tick generated at the second cycle;
and
controlling a reference value that is a base for tick generation and a reference value that is a base for the tick counting result;
wherein a first absolute error value is an absolute value of a difference between the target cycle and the first cycle and a second absolute error value is an absolute value of a difference between the target cycle and the second cycle;
wherein the numbers m and n are determined by the first absolute error value and the second absolute error value;
and
wherein the number m is a value obtained by dividing a least common multiple of the first absolute error value and the second absolute error value by the first absolute error value, and the number n is a value obtained by dividing the least common multiple of the first absolute error value and the second absolute error value by the second absolute error value.

5 more elements

A method of compensating an error of a timer, the method comprising:

generating a tick at first cycle that is shorter than a target cycle by counting a clock signal i times, or generating a tick at a second cycle that is longer than the target cycle by counting the clock signal j times, wherein i and j are predetermined natural numbers equal to or greater than 2;
counting the tick generated at the first cycle m times or counting the tick generated at the second cycle n times, wherein m and n are predetermined natural numbers equal to or greater than 2, and outputting a result of counting the tick generated at the first cycle and the tick generated at the second cycle;
and
controlling a reference value that is a base for tick generation and a reference value that is a base for the tick counting result,
wherein the number m is a value obtained by dividing a least common multiple of a first absolute error value and a second absolute error value by the first absolute error value, and the number n is a value obtained by dividing the least common multiple of the first absolute error value and the second absolute error value by the second absolute error value, and
wherein the first absolute error value is an absolute value of a difference between the target cycle and the first cycle and the second absolute error value is an absolute value of a difference between the target cycle and the second cycle.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/716,492Filed 3 Mar 2010
Priority: KR 10-2009-00180283 Mar 2009
Published: US 2010/0225371 A19 Sep 2010
Granted: 5 Aug 2014
Term ends: Not estimatedThe source records don’t support an estimate.

Classification4 codes

H03L 7/00
Automatic control of frequency or phase
G06F 1/08
Generating or distributing clock signals or signals derived directly therefrom: clock generators with changeable or programmable clock frequency
H03L
Automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or
G06F
Computing and data processing