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US 8,797,079 B2Granted
Differential delay line, ring oscillator and mobile communication device
AssigneeIntel Mobile Communications GmbH
InventorMarkus Schimper
Life of this patent
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Abstract
A differential delay line includes a series connection of a plurality of differential delay stages. Each differential delay stage includes a first delay element and a second delay element. The first delay element has a first input, a second input and an output. The second delay element has a first input, a second input and an output. The output of the first delay element of an n-th differential delay stage of the plurality of differential delay stages is coupled to an input of the second delay element of an (n+m)-th differential delay stage of the plurality of differential delay stages, wherein m is an even natural number larger than or equal to two.
Claims32
A differential delay line comprising:
- a series connection of a plurality of differential delay stages, each differential delay stage comprising a first delay element including a first input, a second input and an output and a second delay element including a first input, a second input and an output;
- and
- wherein the output of the first delay element of an n-th differential delay stage of the plurality of differential delay stages is directly connected to an input of the second delay element of an (n+m)-th differential delay stage of the plurality of differential delay stages, wherein m is an even natural number larger than or equal to two.
A differential ring oscillator comprising:
- a differential delay line comprising:
- a series connection of a plurality of differential delay stages, each differential delay stage comprising a first delay element including a first input, a second input and an output and a second delay element including a first input, a second input and an output;
- wherein the output of the first delay element of an n-th differential delay stage of the plurality of differential delay stages is directly connected to an input of the second delay element of an (n+m)-th differential delay stage of the plurality of differential delay stages, wherein m is an even natural number larger than or equal to two.
A differential delay line comprising:
- a series connection of a plurality of differential delay stages, each differential delay stage comprising a first delay element including a first input, a second input and an output and a second delay element including a first input, a second input and an output;
- wherein a signal at the first input of the first delay element of a differential delay stage of the plurality of differential delay stages is directly applied to an input of the second delay element of a following differential delay stage of the plurality of differential delay stages.
A mobile communication device comprising:
- an antenna port;
- an RF-frontend;
- a digital baseband processor;
- and
- a differential delay line comprising:
- a series connection of a plurality of differential delay stages, each differential delay stage comprising a first delay element including a first input, a second input and an output and a second delay element including a first input, a second input and an output;
- and
- wherein the output of the first delay element of an n-th differential delay stage of the plurality of differential delay stages is directly connected to an input of the second delay element of an (n+m)-th differential delay stage of the plurality of differential delay stages, wherein m is an even natural number larger than or equal to two;
- wherein the differential delay line is comprised in the RF-frontend or in the digital baseband processor;
- and
- wherein the RF-frontend is coupled to the antenna port and the digital baseband processor.
8 more elements
A mobile communication device comprising:
- an antenna port;
- an RF-frontend;
- a digital baseband processor;
- and
- a differential delay line comprising:
- a series connection of a plurality of differential delay stages, each differential delay stage comprising a first delay element including a first input, a second input and an output and a second delay element including a first input, a second input and an output;
- wherein a signal at the first input of the first delay element of a differential delay stage of the plurality of differential delay stages is directly applied to an input of the second delay element of a following differential delay stage of the plurality of differential delay stages;
- wherein the differential delay line is comprised in the RF-frontend or in the digital baseband processor;
- and
- wherein the RF-frontend is coupled to the antenna port and the digital baseband processor.
7 more elements
A method comprising:
- providing a signal at a first input of a first delay element of a differential delay stage of a series connection of a plurality of differential delay stages, each differential delay stage comprising a first delay element including a first input, a second input and an output and a second delay element including a first input, a second input and an output;
- and
- directly applying an output signal of the first delay element of an n-th differential delay stage of the plurality of differential delay stages to an input of the second delay element of an (n+m)-th differential delay stage of the plurality of differential delay stages, wherein m is an even natural number larger than or equal to 2.
A method comprising:
- providing a signal at a first input of a first delay element of a differential delay stage of a series connection of a plurality of differential delay stages, each differential delay stage comprising a first delay element including a first input, a second input and an output and a second delay element including a first input, a second input and an output;
- and
- wherein the signal is directly applied to an input of the second delay element of a following differential delay stage of the plurality of differential delay stages.
A differential delay line comprising:
- a series connection of a plurality of differential delay stages, each differential delay stage comprising a first delay element including a first input, a second input and an output and a second delay element including a first input, a second input and an output;
- wherein the output of the first delay element of each differential delay stage is coupled to the second input of the second delay element of the next-but-one differential delay stage and the output of the second delay element of each differential delay stage is coupled to the second input of the first delay element of the next-but-one differential delay stage;
- wherein the output of the first delay element of each differential delay stage is further coupled to the first input of the first delay element of the next differential delay stage and the output of the second delay element of each differential delay stage is further coupled to the first input of the second delay element of the next differential delay stage;
- and
- wherein each delay element comprises a first inverter coupled between the first input and the output of the delay element and a second inverter coupled between the second input and the output of the delay element.
2 more elements
Dependencies are inferred from the claim text.