Testing of semiconductor chips with microbumps
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Shin-Puu Jeng, Chen-Hua Yu, Chao-Hsiang Yang
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Abstract
Test structures for performing electrical tests of devices under one or more microbumps are provided. Each test structure includes at least one microbump pad and a test pad. The microbump pad is a part of a metal pad connected to an interconnect for a device. A width of the microbump pad is equal to or less than about 50 μm. The test pad is connected to the at least one microbump pad. The test pad has a size large enough to allow circuit probing of the device. The test pad is another part of the metal pad. A width of the test pad is greater than the at least one microbump pad.
Claims20
A test structure for performing electrical tests of devices under one or more microbumps, comprising:
- at least one device;
- and
- a metal pad connected to an interconnect for the at least one device, the metal pad comprising:
- a first portion forming at least one microbump pad, wherein a width of the at least one microbump pad is equal to or less than about 50 μm, wherein the at least one microbump pad is covered by an under bump metallurgy (UBM) layer, and
- a second portion forming a test pad connected to the at least one microbump pad, wherein the test pad has a size large enough to allow circuit probing of the at least first device, and wherein a width of the test pad is greater than the at least one microbump pad, and the test pad is adapted to be covered after circuit probing by a passivation material to prevent particle and corrosion issues.
A test structure for performing electrical tests of devices under one or more microbumps, comprising:
- at least one microbump pad, wherein the at least one microbump pad is a part of a metal pad connected to an interconnect for at least a first device, and wherein a width of the at least one microbump pad is equal to or less than about 50 μm;
- and
- a test pad connected to the at least one microbump pad, wherein the test pad has a size large enough to allow circuit probe involving at least the first device, and wherein the test pad is another part of the metal pad, and wherein a width of the test pad is greater than the at least one microbump pad;
- wherein the test pad is covered after circuit probe by a passivation material to prevent particle and corrosion issues.
A method of forming and testing a test structure for electrical tests of devices under one or more microbumps, comprising:
- depositing a first passivation layer over a metal pad on a semiconductor substrate;
- defining at least one microbump pad connected to a test pad by patterning the first passivation layer, wherein the at least one microbump pad is connected to interconnect of a first device, and the test pad is adapted to be covered after circuit probing by a passivation material to prevent particle and corrosion issues;
- performing circuit probing on the test pad to electrically test devices connected to the at least one microbump pad;
- forming a second passivation layer to cover the test pad and to expose the at least one microbump pad;
- and
- forming a microbump on each of the at least one microbump pad.
Dependencies are inferred from the claim text.