Virtually substrate-less composite power semiconductor device

A substrate-less composite power semiconductor device (VSLCPSD) comprising:

• a sandwich structure comprising a power semiconductor device (PSD) made out of a semiconductor device material, a front-face device carrier (FDC) made out of a carrier material, and an intervening bonding layer (IBL) between the PSD and the FDC, wherein the PSD is a vertical power semiconductor device (VPSD) with a back metallization covering the entire back surface of the VPSD forming a major electrode on its back surface, wherein the IBL covers the entire front surface of the PSD and the entire IBL is sandwiched between the PSD and the FDC;
• the PSD having a back substrate portion and a front semiconductor device portion with two or more patterned front-face device metallization pads separated by a top passivation, the PSD further having a thickness TPSD comparable to a thickness of the front semiconductor device portion;
• and
• the FDC having two or more patterned front-face carrier metallization pads and a plurality of through-carrier conductive vias respectively electrically connecting the front-face carrier metallization pads to the front-face device metallization pads, wherein the through-carrier conductive vias penetrate through the IBL.