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US 8,796,855 B2Granted
Semiconductor devices with nonconductive vias
AssigneeFreescale Semiconductor, Inc.
InventorsPerry H. Pelley, Michael B. McShane, Tab A. Stephens
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Abstract
An electric device with vias that include dielectric structures to prevent conductive material in the vias from electrically connecting conductive structures on a top of the vias with conductive structures on the bottom of the vias. The dielectric structures are formed in selected vias where other vias do not include the dielectric structures.
Claims17
An electric device comprising:
- a first conductive structure;
- a second conductive structure;
- a dielectric layer over the first conductive structure and the second conductive structure;
- a third conductive structure located over the dielectric layer;
- a fourth conductive structure located over and in direct contact with the dielectric layer,
- a first via extending from the first conductive structure to the third conductive structure through the dielectric layer, the first via including conductive material that electrically connects the first connective structure and the third conductive structure;
- a second via extending from the second conductive structure to the fourth conductive structure though the dielectric layer, wherein the second via includes conductive material, the second via includes a dielectric structure that prevents the conductive material of the second via from electrically connecting the second conductive structure to the fourth conductive structure, further wherein the first conductive structure and the second conductive structure are characterized as a first control terminal structure and a second control terminal structure for a first a first transistor and a second transistor, respectively;
- and a doped region under each of the first and second conductive structures.
5 more elements
An electric device comprising:
- a first standard cell implementing a first circuit function,
- a second standard cell implementing a second circuit function, the second circuit function being different than the first circuit function;
- wherein the first standard cell includes a first connector structure located over a substrate and two transistors implemented in the substrate;
- wherein the second standard cell includes a second connector structure located over the substrate and two transistors implemented in the substrate;
- wherein the first connector structure and transistors of the first standard cell have an identical layout as the second connector structure and transistors of the second standard cell;
- wherein the first standard cell includes a first via and a second via, the first via extends from the first connector structure at a first location of the first connector structure to a first conductive interconnect, the second via extends from the first connector structure at a second location of the first connector structure to a second conductive interconnect, wherein the first via includes electrically conductive material electrically connecting the first connector structure to the first conductive interconnect, wherein the second via includes conductive material and a first dielectric structure, wherein the first dielectric structure prevents the conductive material of the second via from electrically connecting the first connector structure to the second conductive interconnect;
- wherein the second standard cell includes a third via and a fourth via, the third via extends from the second connector structure at a third location of the second connector structure to a third conductive interconnect, the fourth via extends from the second connector structure at a fourth location of the second connector structure to a fourth conductive interconnect, wherein the third via includes electrically conductive material electrically connecting the second connector structure to the third conductive interconnect, wherein the fourth via includes conductive material and a second dielectric structure, wherein the second dielectric structure prevents the conductive material of the fourth via from electrically connecting the second connector structure to the fourth conductive interconnect;
- and
- wherein the first location of the first standard cell corresponds to the fourth location of the second standard cell and the second location of the first standard cell corresponds to the third location of the second standard cell.
6 more elements
An electric device comprising:
- a dielectric layer formed over a work piece, the work piece including a first conductive structure and a second conductive structure;
- and a doped region under each of the first and second conductive structures;
- a first opening formed in the dielectric layer to expose the first conductive structure and a second opening in the dielectric layer to expose the second conductive structure;
- a third conductive structure formed in the first opening;
- a fourth conductive structure formed in the second opening;
- a dielectric structure formed in the second opening, wherein the dielectric structure is in direct contact with the dielectric layer;
- a fifth conductive structure formed directly over the first opening, wherein the third conductive structure electrically connects the first conductive structure to the fifth conductive structure;
- and
- a sixth conductive structure formed directly over the second opening, wherein the dielectric structure prevents the fourth conductive structure from electrically connecting the second conductive structure to the sixth conductive structure, wherein the first conductive structure and the second conductive structure are characterized as a first silicide structure on a first doped well region of a substrate and second silicide structure on a second doped well region, respectively, of a semiconductor material of the work piece, and the first conductive structure and the second conductive structure are characterized as a first control terminal structure and a second control terminal structure for a first a first transistor and a second transistor, respectively, of the work piece.
6 more elements
Dependencies are inferred from the claim text.