Metal bump joint structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJing-Cheng Lin
Life of this patent
Estimating the term…
Abstract
A structure comprises a first semiconductor chip with a first metal bump and a second semiconductor chip with a second metal bump. The structure further comprises a solder joint structure electrically connecting the first semiconductor chip and the second semiconductor chip, wherein the solder joint structure comprises an intermetallic compound region between the first metal bump and the second metal bump, wherein the intermetallic compound region is with a first height dimension and a surrounding portion formed along exterior walls of the first metal bump and the second metal bump, wherein the surrounding portion is with a second height dimension, and wherein the second height dimension is greater than the first height dimension.
Claims20
A structure comprising:
- a first semiconductor component having:
- a first metal bump comprising a first material and formed on a surface of the first semiconductor component;
- and
- a first barrier layer comprising a second material different from the first material and formed on the first metal bump;
- a second semiconductor component having:
- a second metal bump comprising a third material and formed on a surface of the second semiconductor component;
- and
- a second barrier layer comprising a fourth material different from the third material and formed on the second metal bump;
- and
- a solder joint structure electrically connecting the first metal bump and the second metal bump, wherein the solder joint structure comprises:
- an intermetallic compound region formed between the first barrier layer and the second barrier layer, the intermetallic compound region comprising a compound comprising at least one element of the second material and/or the fourth material and at least one element of a solder material, wherein the intermetallic compound region has a vertical dimension from the first barrier layer to the second barrier layer;
- and
- a surrounding portion comprising the solder material and formed along exterior walls of the first metal bump and the second metal bump, wherein the surrounding portion has a lateral dimension from a point aligned with at least one of respective walls of the first barrier layer and the second barrier layer to a nearest exterior surface of the surrounding portion, and wherein the lateral dimension is greater than the vertical dimension.
A device comprising:
- a first semiconductor chip comprising:
- a first semiconductor substrate;
- a first interconnect structure formed on the first semiconductor substrate;
- a first copper bump formed on the first interconnect structure;
- and
- a first barrier layer on a first planar surface of the first copper bump and not on a second surface of the first copper bump;
- a second semiconductor chip stacked on the first semiconductor chip, wherein the second semiconductor chip comprises:
- a second semiconductor substrate;
- a second interconnect structure formed on the second semiconductor substrate;
- a second copper bump formed on over the second interconnect structure;
- and
- a second barrier layer on a third planar surface of the second copper bump and not on a fourth surface of the second copper bump;
- and
- a solder joint structure electrically connecting the first copper bump and the second copper bump, wherein the solder joint structure comprises:
- an intermetallic compound region formed between the first barrier layer and the second barrier, wherein the intermetallic compound region has a vertical dimension from the first barrier layer to the second barrier layer;
- and
- a surrounding portion formed along exterior walls of the first copper bump and the second copper bump, wherein the surrounding portion a lateral dimension from a point aligned with at least one of walls of the first barrier layer and the second barrier layer to a nearest exterior surface of the surrounding portion, and wherein the lateral dimension is greater than the vertical dimension.
A structure comprising:
- a first package component having a first copper bump on a first surface of the first package component and a first barrier layer on the first copper bump disposed distally from the first surface, the first barrier layer comprising a first material different from copper;
- a second package component having a second copper bump on a second surface of the second package component and a second barrier layer on the second copper bump disposed distally from the second surface, the second barrier layer comprising a second material different from copper;
- a intermetallic compound region between the first barrier layer and the second barrier layer and comprising an intermetallic compound, the intermetallic compound region having a vertical dimension from the first barrier layer and the second barrier layer;
- and
- a surrounding portion along respective walls of the first copper bump, the first barrier layer, the second copper bump, and the second barrier layer, the surround portion comprising a solder material, the intermetallic compound comprising at least one element of the solder material and at least one element of the first material and/or the second material, the surrounding portion having a lateral dimension from a point aligned with at least one of the respective walls of the first barrier layer and the second barrier layer to a nearest exterior surface of the surrounding portion, the lateral dimension being greater than the vertical dimension.
Dependencies are inferred from the claim text.