Semiconductor device with a vertical interconnect structure for 3-D FO-WLCSP

A semiconductor device, comprising:

• a first conductive layer including a gap between a first area of the first conductive layer and a second area of the first conductive layer;
• a conductive pillar formed over the first area of the first conductive layer;
• a semiconductor die disposed over a first surface of the second area of the first conductive layer;
• and
• a second conductive layer formed over the first area of the first conductive layer and a second surface of the second area of the first conductive layer opposite the first surface of the second area.

A semiconductor device, comprising:

• a conductive layer including a first area isolated from a second area of the conductive layer;
• a conductive pillar disposed over the first area of the conductive layer;
• a semiconductor die or component disposed over the second area of the conductive layer;
• and
• a first bump formed over the first area of the conductive layer and the second area of the conductive layer.

A semiconductor device, comprising:

• a first conductive layer including an interconnect line and under bump metallization pad;
• a conductive pillar formed over the first conductive layer;
• a semiconductor die disposed over the first conductive layer;
• and
• a bump formed over the first conductive layer electrically connecting the interconnect line and under bump metallization pad.