Semiconductor assembly that includes a power semiconductor die located on a cell defined by first and second patterned polymer layers

A method for forming a semiconductor assembly, comprising:

• forming a first patterned polymer layer on a surface of a heat sink to define an exposed portion of the surface of the heat sink, said exposed portion not covered by said first patterned polymer layer, said exposed portion of the surface of the surface of the heat sink extending radially inward from the first patterned polymer layer, said first patterned polymer layer defining a first cell for accommodating a power semiconductor die;
• applying a solder material onto the exposed portion of the surface of the heat sink in the first cell;
• positioning a power semiconductor die within the first cell on the surface of the heat sink extending radially inward from the first patterned polymer layer so that the power semiconductor die is thermally coupled to the heat sink by the solder material;
• forming a second patterned polymer layer on a surface of a second heat sink to define an exposed portion of the surface of the second heat sink, said exposed portion of the surface second heat sink extending radially inward from the second patterned polymer layer, said second patterned polymer layer defining a second cell for accommodating a power semiconductor die;
• applying a second solder material onto a top surface of the power semiconductor device;
• and
• positioning the power semiconductor die within the second cell so that the solder material on the top surface of the power semiconductor die contacts the exposed portion of the surface of the second heat sink and is thermally coupled to the second heat sink by the second solder material.