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US 8,796,812 B2Granted
Self-aligned trench over fin
AssigneeInternational Business Machines Corporation
InventorsChiahsun Tseng, Chun-chen Yeh, Yunpeng Yin, Lei L. Zhuang
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AssigneeInternational Business Machines Corporation
InventorsChiahsun Tseng, Chun-chen Yeh, Yunpeng Yin, Lei L. Zhuang
Estimating the term…
A stack of a first hard mask portion and a second hard mask portion is formed over a semiconductor material layer by anisotropically etching a stack, from bottom to top, of a first hard mask layer and a second hard mask layer. The first hard mask portion is laterally recessed by an isotropic etch. A dielectric material layer is conformally deposited and planarized. The dielectric material layer is etched employing an anisotropic etch that is selective to the first hard mask portion to form a dielectric material portion that laterally surrounds the first hard mask portion. After removal of the second and first hard mask portions, the semiconductor material layer is etched employing the dielectric material portion as an etch mask. Optionally, portions of the semiconductor material layer underneath the first and second hard mask portions can be undercut at a periphery.
A semiconductor structure comprising a semiconductor fin having a bottommost surface that contacts a top surface of a dielectric layer, said semiconductor fin comprising a lower portion and an upper portion, said upper portion comprising a first upper portion integrally adjoined to a first peripheral portion of said lower portion and a second upper portion integrally adjoined to a second peripheral portion of said lower portion, wherein a cavity embedded in said semiconductor fin vertically extends from top surfaces of said first and second upper portions to a top surface of said lower portion, and laterally extends from an inner sidewall of said first upper portion to an inner sidewall of said second upper portion.
A semiconductor structure comprising a semiconductor fin located on a dielectric layer, said semiconductor fin comprising a lower portion and an upper portion, said upper portion comprising a first upper portion integrally adjoined to a first peripheral portion of said lower portion and a second upper portion integrally adjoined to a second peripheral portion of said lower portion, wherein a cavity embedded in said semiconductor fin vertically extends from top surfaces of said first and second upper portions to a top surface of said lower portion, and laterally extends from an inner sidewall of said first upper portion to an inner sidewall of said second upper portion, and wherein said lower portion comprises a pair of curved sidewalls that adjoin bottom portions of an outer vertical sidewall of said first upper portion and an outer vertical sidewall of said second upper portion.
Dependencies are inferred from the claim text.