Magnetoresistive element, magnetic random access memory and method of manufacturing the same
AssigneesRenesas Electronics Corporation, NEC Corporation
InventorsYasuaki Ozaki, Hiroaki Honjyou
Life of this patent
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Abstract
A magnetoresistive element includes: a lower magnetic layer; a barrier layer; and an upper magnetic layer. The barrier layer is provided on the lower magnetic layer. The upper magnetic layer is provided on the barrier layer. One of magnetization directions of the lower magnetic layer and the upper magnetic layer is fixed. The barrier layer has a first surface which includes a surface contacted with an upper surface of the lower magnetic layer. The upper magnetic layer has a second surface which includes a surface contacted with an upper surface of the barrier layer. Each of the first surface and the second surface is larger than the upper surface of the lower magnetic layer in area.
Claims14
A magnetoresistive element comprising:
- a lower magnetic layer;
- a barrier layer configured to be provided on said lower magnetic layer;
- and
- an upper magnetic layer configured to be provided on said barrier layer,
- wherein one of magnetization directions of said lower magnetic layer and said upper magnetic layer is fixed,
- wherein said barrier layer has a first surface which includes a surface contacted with an upper surface of said lower magnetic layer,
- wherein said upper magnetic layer has a second surface which includes a surface contacted with an upper surface of said barrier layer,
- wherein each of said first surface and said second surface is greater than said upper surface of the lower magnetic layer in area,
- wherein the lower magnetic layer is formed on a substrate below the barrier layer and the upper magnetic layer,
- wherein the substrate is larger than the lower magnetic layer in area,
- wherein said lower magnetic layer is embedded in an interlayer insulating layer, and
- wherein said barrier layer is provided to cover said lower magnetic layer and a part of said interlayer insulating layer,
- wherein said interlayer insulating layer includes a silicon nitride film configured to be formed on a side surface of said lower magnetic layer, and
- wherein said interlayer insulating layer includes a laminated layer of the silicon nitride film formed along the side surface of said lower magnetic layer as a sidewall and a top surface of the substrate and an oxide film, the silicon nitride film being formed between the oxide film and the lower magnetic layer, and the silicon nitride film being formed between the oxide film and the substrate.
A magnetic random access memory comprising:
- a plurality of memory cells configured to be provided in a matrix,
- wherein each of said plurality of memory cells includes a magnetoresistive element,
- wherein said magnetoresistive element includes:
- a lower magnetic layer;
- a barrier layer configured to be provided on said lower magnetic layer;
- and
- an upper magnetic layer configured to be provided on said barrier layer,
- wherein one of magnetization directions of said lower magnetic layer and said upper magnetic layer is fixed,
- wherein said barrier layer has a first surface which includes a surface contacted with an upper surface of said lower magnetic layer,
- wherein said upper magnetic layer has a second surface which includes a surface contacted with an upper surface of said barrier layer,
- wherein each of said first surface and said second surface is greater than said upper surface of the lower magnetic layer in area,
- wherein the lower magnetic layer is formed on a substrate below the barrier layer and the upper magnetic layer,
- wherein the substrate is larger than the lower magnetic layer in area,
- wherein said lower magnetic layer is embedded in an interlayer insulating layer, and
- wherein said barrier layer is provided to cover said lower magnetic layer and a part of said interlayer insulating layer,
- wherein said interlayer insulating layer includes a silicon nitride film configured to be formed on a side surface of said lower magnetic layer, and
- wherein said interlayer insulating layer includes a laminated layer of the silicon nitride film formed along the side surface of said lower magnetic layer as a sidewall and a top surface of the substrate and an oxide film, the silicon nitride film being formed between the oxide film and the lower magnetic layer, the silicon nitride film being formed between the oxide film and the substrate.
Dependencies are inferred from the claim text.